MAX32665-MAX32668 User Guide
Maxim Integrated Page 442 of 457
23.6.2.3 Optimized Calculations
The optimized calculation control bit (MAA_CTRL.ocal) allows the software to optimize the speed of an exponentiation by
skipping unnecessary multiply operations when the corresponding exponent bit is a 0. The bit defaults to 0, forcing the
MAA to operate in a non-optimized mode. The non-optimized mode skips the leading zeros of the exponent and starts
square/multiply operations when a 1 is detected. From this point on, multiply operation are completed for every exponent
bit, regardless of its logical value.
Optimization is highly discouraged, as it leaves the device vulnerable to power analysis attacks.
23.6.2.4 MAA Operand Sizes
MAA operand size is specified by MAA_MAWS.msgsz. Valid values are from 1 to 2048. This value specifies valid ranges for a,
b, e, and m.
a, b, and e, can have any values between 0 and 2MAWS-1 inclusive as long as their number of bits are less than those of m.
For exponentiation operation, however, b memory must contain the value of 1, and e cannot be 0.
The m memory, which holds the modulus, has a value from 2MAWS-1 up to 2MAWS-1. For example, for a 16-bit
MAA_MAWS.msgsz =0x10, it has a value from 0x8000 (32768) up to 0xFFFF (65535).
If any parameter exceeds Word Size (MAWS), an invalid result is generated without issuing an MAA error status. It is up to
application to check for invalid word sizes.
The MAA operands are stored as 64-bit blocks. For all the memories, operands must be zero padded to the 64-bit block
boundary. There is no restriction on values stored in the memories beyond this boundary. For example, MAA_MAWS.msgsz
=65, and operand=01 xxxx xxxx xxxx xxxxh. In this example, MAA operands are stored as two 64-bit blocks. Bit[63:0]
contains the lower 64 bits. Bit[127:66] are zero padded while bit[65]=1. Data in the words above where the 0000 0000 0000
0001h is stored can have any value.
For most calculations, memory segments t and r are used to store intermediate values during round operations and can
contain the same value at the final operation.
For square-multiply and exponentiation, memory segment b is an additional temporary storage area during round
operations.
23.7 True Random Number Generation
The Maxim-supplied Universal Cryptographic Library (UCL), implements a random bit generator that may be compliant with
the entropy requirements of commonly used data security validations. The general information in this section is provided
only for completeness; Maxim will work directly with the customer’s chosen security validation laboratory and provide that
all the information required for validation directly to that agency.
Entropy is continuously generated by the TRNG. It can be retrieved in groups of 32- and 128 bits through one or four
consecutive reads of the 32-bit TRNG_DATA register . Hardware sets TRNG_CN.rng_is = 1 when 32 bits are available in the
TRNG FIFO, and sets TRNG_CN.rng_4is = 1 when 128 bits are in the FIFO. Software must set TRNG_CN.rng_isc = 1, which
clears TRNG_CN.rng_is and TRNG_CN.rng_i4s, before reading from the TRNG register.
An optional interrupt can be generated if TRNG_CN.rng_ie = 1 when hardware sets TRNG_CN.rng_4is = 1.
23.8 Registers
Access to specific registers is controlled to prevent software reading from or writing to the registers while they are
performing specific functions.
To Next Page
Loading...