Maxim Integrated MAX32665 - Table 6-13: GPIO Port N Output Enable Atomic Set Register; Table 6-14: GPIO Port N Output Enable Atomic Clear Register; Table 6-15: GPIO Port N Output Register; Table 6-16: GPIO Port N Output Atomic Set Register

MAX32665-MAX32668 User Guide
Maxim Integrated Page 127 of 457
Table 6-13: GPIO Port n Output Enable Atomic Set Register
GPIO Port n Output Enable Atomic Set
GPIOn_OUT_EN_SET
[0x0010]
Bits
Field
Access
Reset
Description
31:0
-
WO
0
GPIO Output Enable Atomic Set
Writing 1 to one or more bits sets the corresponding bits in GPIOn_OUT_EN.
0: No effect.
1: Corresponding bits in GPIOn_OUT_EN set to 1.
Table 6-14: GPIO Port n Output Enable Atomic Clear Register
GPIO Port n Output Enable Atomic Clear
GPIOn_OUT_EN_CLR
[0x0014]
Bits
Field
Access
Reset
Description
31:0
-
WO
0
GPIO Output Enable Atomic Clear
Writing 1 to one or more bits sets the corresponding bits in GPIOn_OUT_EN.
0: No effect.
1: Corresponding bits in GPIOn_OUT_EN cleared to 0.
Table 6-15: GPIO Port n Output Register
GPIO Port n Output
GPIOn_OUT
[0x0018]
Bits
Field
Access
Reset
Description
31:0
-
R/W
0
GPIO Output
Set the corresponding output pin high or low.
0: Drive the corresponding output pin low (logic 0).
1: Drive the corresponding output pin high (logic 1).
Table 6-16: GPIO Port n Output Atomic Set Register
GPIO Port n Output Atomic Set
GPIOn_OUT_SET
[0x001C]
Bits
Field
Access
Reset
Description
31:0
-
WO
0
GPIO Output Atomic Set
Writing 1 to one or more bits in this register sets the corresponding bits in the
GPIOn_OUT register.
Writing 1 to one or more bits sets the corresponding bits in GPIOn_OUT.
0: No effect.
1: Corresponding bits in GPIOn_OUT_EN set to 1.
Table 6-17: GPIO Port n Output Atomic Clear Register
GPIO Port n Output Atomic Clear
GPIOn_OUT_CLR
[0x0020]
Bits
Field
Access
Reset
Description
31:0
-
WO
0
GPIO Output Atomic Clear
Writing 1 to one or more bits in this register clears the corresponding bits in the
GPIOn_OUT register.
0: No effect.
1: Corresponding bits in GPIOn_OUT_EN cleared to 0.