Maxim Integrated MAX32665 - Table 23-23: Cipher Key Register [7:0]; Table 23-24: HASH Message Digest Register [15:0]; Table 23-25: Hash Message Size Registers

MAX32665-MAX32668 User Guide
Maxim Integrated Page 454 of 457
Table 23-23: Cipher Key Register [7:0]
Cipher Key Register0 [31:0]
CIPHER_KEY_0
[0x0060]
Cipher Key Register 1 [63:32]
CIPHER_KEY_1
[0x0064]
Cipher Key Register 2 [95:64]
CIPHER_KEY_2
[0x0068]
Cipher Key Register 3 [127:96]
CIPHER_KEY_3
[0x006C]
Cipher Key Register 4 [159:128]
CIPHER_KEY_4
[0x0070]
Cipher Key Register 5 [191:160]
CIPHER_KEY_5
[0x0074]
Cipher Key Register 6 [223:192]
CIPHER_KEY_6
[0x0078]
Cipher Key Register 7 [255:224]
CIPHER_KEY_7
[0x007C]
BITS
NAME
ACCESS
RESET
DESCRIPTION
31:0
key
R/W
0
Cipher Key
These registers hold the cipher key used for block cipher operations. The number of
bits used depends on the specific operation. See the CIPHER_CTRL.key field for
information on loading this register.
This register is affected by the endian swap input control bits.
Table 23-24: HASH Message Digest Register [15:0]
Hash Message Digest Register 0 [31:0]
HASH_DIGEST_0
[0x0080]
Hash Message Digest Register 1 [63:32]
HASH_DIGEST_1
[0x0084]
Hash Message Digest Register 2 [95:64]
HASH_DIGEST_2
[0x0088]
Hash Message Digest Register 3 [127:96]
HASH_DIGEST_3
[0x008C]
Hash Message Digest Register 4 [159:128]
HASH_DIGEST_4
[0x0090]
Hash Message Digest Register 5 [191:160]
HASH_DIGEST_5
[0x0094]
Hash Message Digest Register 6 [223:192]
HASH_DIGEST_6
[0x0098]
Hash Message Digest Register 7 [255:224]
HASH_DIGEST_7
[0x009C]
Hash Message Digest Register 8 [287:256]
HASH_DIGEST_8
[0x00A0]
Hash Message Digest Register 9 [319:288]
HASH_DIGEST_9
[0x00A4]
Hash Message Digest Register 10 [351:320]
HASH_DIGEST_10
[0x00A8]
Hash Message Digest Register 11 [383:352]
HASH_DIGEST_11
[0x00AC]
Hash Message Digest Register 12 [415:384]
HASH_DIGEST_12
[0x00B0]
Hash Message Digest Register 13 [447:416]
HASH_DIGEST_13
[0x00B4]
Hash Message Digest Register 14 [479:448]
HASH_DIGEST_14
[0x00B8]
Hash Message Digest Register 15 [511:480]
HASH_DIGEST_15
[0x00BC]
BITS
NAME
ACCESS
RESET
DESCRIPTION
31:0
hash
R/W
0
Calculated Hash Value
These 16 registers hold the 512-bit calculated hash value. This register is affected by
the endian swap bits.
Table 23-25: Hash Message Size Registers
Hash Message Size Register 0 [31:0]
HASH MSG_SZ_0
[0x00C0]
Hash Message Size Register 1 [63:32]
HASH MSG_SZ_1
[0x00C4]
Hash Message Size Register 2 [95:64]
HASH MSG_SZ_2
[0x00C8]
Hash Message Size Register 3 [127:96]
HASH MSG_SZ_3
[0x00CC]
BITS
NAME
ACCESS
RESET
DESCRIPTION
31:0
msgsz
R/W
0
Hash Message Size
These four registers hold the 128-bit message size in bytes.