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Maxim Integrated MAX32665 - Table 4-18: Control Register

Maxim Integrated MAX32665
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MAX32665-MAX32668 User Guide
Maxim Integrated Page 70 of 457
Comparator Enable
MCR_AINCOMP
[0x000C]
Bits
Field
Access
Reset
Description
3
aincomp3pd
R/W
1
Comparator 3 Disable
0:Comparator is powered and enabled
1:Comparator is powered down and disabled
2
aincomp2pd
R/W
1
Comparator 2 Disable
0:Comparator is powered and enabled
1:Comparator is powered down and disabled
1
aincomp1pd
R/W
1
Comparator 1 Disable
0:Comparator is powered and enabled
1:Comparator is powered down and disabled
0
aincomp0pd
R/W
1
Comparator 0 Disable
0:Comparator is powered and enabled
1:Comparator is powered down and disabled
Table 4-18: Control Register
Control
MCR_CTRL
[0x0010]
Bits
Field
Access
Reset
Description
31:11
-
RO
0
Reserved
Do not modify this field.
10
rstn_voltage_sel
R/W
0
RSTN Voltage Supply Select
This bit setting determines which supply voltage drives the RSTN device pin.
0: V
DDIO
1: V
DDIOH
Note: This bit is only affected by a Power On Reset event. RSTN assertion has no affect
on this bit setting.
9
p1m
R/W
0
RSTN Device Pin Internal Pullup
This pin controls the internal pullup value connected to the RSTN device pin.
0: 1MOhm
1: 25KOhm
8
buckclkscalen
R/W
0
SIMO Dynamic Clock Scaling Enable
Allows the dynamic scaling of the SIMO clock as part of the Dynamic Voltage Scaling
operation.
0: Disabled
1: Enabled
7:4
-
RO
0
Reserved
Do not modify this field.
3
usbswen_n
R/W
0
USB PHY Power Gate Control
This bit is sampled when entering DEEPSLEEP or BACKUP mode.
0: USB Switch On
1: USB Switch Off

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