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Maxim Integrated MAX32665 - Usage; Reset State; MPU Implementation; MPU Protection Fault

Maxim Integrated MAX32665
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MAX32665-MAX32668 User Guide
Maxim Integrated Page 28 of 457
SPIM
Y
Y
Y
Y
Y
USBHS
Y
Y
Y
Y
Data Cache
Y
Y
Y
Y
Y
Y
Y
SDIO/SDHC Target
Y
Y
Y
Y
Y
Y
Y
QSPI/SPI
Y
Y
Y
Y
Y
2.2 Usage
2.2.1 Reset State
During a power-on-reset event, RPU registers are reset to their reset value. If RPU protection is desired, the registers must
be reprogrammed during the boot sequence.
The RPU registers can also be reset by writing 1 to the Global Control register bit RSTR.RPU.
2.2.2 MPU Implementation
Accesses to system memory still involve interaction with both the RPU first and then MPU. The RPU grants access to MPU
functionality including:
Protection regions
Overlapping protection regions, with ascending region priority
Access permissions
Exporting memory attributes to the system
The MPU can:
Enforce privilege rules
Separate processes
Enforce access rules
2.2.3 MPU Protection Fault
The MPU can generate three types of faults:
Background fault
Permission fault
Alignment fault
When a fault occurs, the memory access or instruction fetch is synchronously aborted, and a prefetch abort or data abort
exception is taken as appropriate. No memory accesses are performed on the AXI bus master interface or peripheral.
2.2.4 RPU Protection Fault
An RPU protection fault occurs when an AHB master attempts to access a slave that does not have the corresponding bits in
its RPU register cleared. This will be expressed as an AHB bus fault.
2.2.5 RPU Fault Handler
Sample code demonstrating the implementation of an RPU Fault Handler is provided in the SDK.

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