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Maxim Integrated MAX32665 - Table 4-59: Peripheral Clock Disable Register 0

Maxim Integrated MAX32665
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MAX32665-MAX32668 User Guide
Maxim Integrated Page 94 of 457
Table 4-59: Peripheral Clock Disable Register 0
Peripheral Clocks Disable 0
GCR_PCLK_DIS0
[0x0024]
Bits
Field
Access
Reset
Description
31
spixipm
R/W
1
SPIXF Master Clock Disable
Disabling a clock disables functionality while also saving power. Reads and writes to
peripheral registers are disabled. Peripheral register states are retained.
0: Clock enabled.
1: Clock disabled.
30
spixipf
R/W
1
SPIXF Clock Disable
Disabling a clock disables functionality while also saving power. Reads and writes to
peripheral registers are disabled. Peripheral register states are retained.
0: Clock enabled.
1: Clock disabled
29
pt
R/W
1
Pulse Train Clock Disable
Disabling a clock disables functionality while also saving power. Reads and writes to
peripheral registers are disabled. Peripheral register states are retained.
0: Clock enabled.
1: Clock disabled
28
i2c1
R/W
1
I2C1 Clock Disable
Disabling a clock disables functionality while also saving power. Reads and writes to
peripheral registers are disabled. Peripheral register states are retained.
0: Clock enabled.
1: Clock disabled
27:24
-
R/W
0b1111
Reserved
Do not modify this field.
23
adc
R/W
1
ADC Clock Disable
Disabling a clock disables functionality while also saving power. Reads and writes to
peripheral registers are disabled. Peripheral register states are retained.
0: Clock enabled.
1: Clock disabled
22:21
-
R/W
0b11
Reserved
Do not modify this field.
20
timer5
R/W
1
TMR5 Clock Disable
Disabling a clock disables functionality while also saving power. Reads and writes to
peripheral registers are disabled. Peripheral register states are retained.
0: Clock enabled.
1: Clock disabled.
19
timer4
R/W
1
TMR4 Clock Disable
Disabling a clock disables functionality while also saving power. Reads and writes to
peripheral registers are disabled. Peripheral register states are retained.
0: Clock enabled.
1: Clock disabled.
18
timer3
R/W
1
TMR3 Clock Disable
Disabling a clock disables functionality while also saving power. Reads and writes to
peripheral registers are disabled. Peripheral register states are retained.
0: Clock enabled.
1: Clock disabled.

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