MAX32665-MAX32668 User Guide
Maxim Integrated Page 94 of 457
Table 4-59: Peripheral Clock Disable Register 0
Peripheral Clocks Disable 0
SPIXF Master Clock Disable
Disabling a clock disables functionality while also saving power. Reads and writes to
peripheral registers are disabled. Peripheral register states are retained.
0: Clock enabled.
1: Clock disabled.
SPIXF Clock Disable
Disabling a clock disables functionality while also saving power. Reads and writes to
peripheral registers are disabled. Peripheral register states are retained.
0: Clock enabled.
1: Clock disabled
Pulse Train Clock Disable
Disabling a clock disables functionality while also saving power. Reads and writes to
peripheral registers are disabled. Peripheral register states are retained.
0: Clock enabled.
1: Clock disabled
I2C1 Clock Disable
Disabling a clock disables functionality while also saving power. Reads and writes to
peripheral registers are disabled. Peripheral register states are retained.
0: Clock enabled.
1: Clock disabled
Reserved
Do not modify this field.
ADC Clock Disable
Disabling a clock disables functionality while also saving power. Reads and writes to
peripheral registers are disabled. Peripheral register states are retained.
0: Clock enabled.
1: Clock disabled
Reserved
Do not modify this field.
TMR5 Clock Disable
Disabling a clock disables functionality while also saving power. Reads and writes to
peripheral registers are disabled. Peripheral register states are retained.
0: Clock enabled.
1: Clock disabled.
TMR4 Clock Disable
Disabling a clock disables functionality while also saving power. Reads and writes to
peripheral registers are disabled. Peripheral register states are retained.
0: Clock enabled.
1: Clock disabled.
TMR3 Clock Disable
Disabling a clock disables functionality while also saving power. Reads and writes to
peripheral registers are disabled. Peripheral register states are retained.
0: Clock enabled.
1: Clock disabled.