MAX32665-MAX32668 User Guide
Maxim Integrated Page 238 of 457
10. Cyclic Redundancy Check Engine (CRC)
The Cyclic Redundancy Checks (CRCs) engine can perform CRC functions on data stored in SRAM. The CRC engine cannot be
used to perform a CRC of data stored in flash memory.
An n-bit CRC can detect the following types of errors:
• Single-bit errors
• Two-bit errors for block lengths less than 2k where k is the order of the longest irreducible factor of the polynomial
• Odd numbers of errors for polynomials with the parity polynomial (x+1) as one of its factors (polynomials with an
even number of terms)
• Burst errors less than n bits
Overall, all except 1 out of 2n errors are detected:
• 99.998% for a 16-bit CRC
• 99.99999998% for a 32-bit CRC
The hardware accelerator calculates the CRC of a block of data. Data is written to the Crypto data register.
The starting initial CRC value is typically preset to all ones. If the starting initial value is preset to all zeros and an initial
stream of all zeros is processed as the data, the CRC does not change.
Historically, CRCs were calculated on serial bit streams. Most serial bit streams were sent least significant bit (LSB) first. The
CRC was calculated as each bit was transmitted or received. This resulted in the CRC being calculated on the LSB of the data
first.
The CRC is typically appended to the end of the data. If the receiver calculates the CRC on both the data and received CRC,
the result should be all zeros if the data and CRC were received error-free. Most implementations do not like to check
against an all-zero checksum. Therefore, most implementations invert the CRC before transmitting it. By inverting the CRC
on the transmitting end, the resulting CRC on the receiving end should be a constant. The specific constant is dependent
upon the CRC polynomial. This works because the non-inverted CRC calculated at the end of the data XOR’d with the
received inverted CRC is all ones ( ). Shifting all ones through the polynomial results in the same constant
for each message, and the constant is dependent upon the polynomial.
Because the receiving end calculates a new CRC on both the data and received CRC, you must send the received CRC in the
correct order, so the highest-order term of the CRC is shifted through the generator first. Because data is typically shifted
through the generator LSB first, this means the CRC is reversed bitwise, with the highest-order term of the remainder in the
LSB position. Software CRC algorithms typically handle this by calculating everything backwards. They reverse the
polynomial and do right shifts on the data. The resulting CRC ends up being bit swapped and in the correct format.
The CRYPTO_CRC register is preset to all ones if the crypto block is reset. The initial CRC state is written to any value. The
final inversion must be done by software if required.
The CRC generator has a programmable polynomial up to 32 bits. The polynomial should be written to the CRC_POLY
register. The largest term
defines the length of the CRC. When calculating the CRC on data LSB first, the polynomial
should be reversed so that the coefficient of the highest power term is in the LSB position. The largest term
is implied
(always one) and should be omitted when writing to the CRC_POLY register. This is necessary because the polynomial is
always one bit larger than the resulting CRC, so a 32-bit CRC has a polynomial with 33 terms (
).
CRC polynomials with good error-detection properties should be irreducible (the polynomial should not be factorable).
Therefore, the constant term
or 1 should always be present, otherwise, the polynomial would be factorable by . If the
constant term
or 1 were not present, the resulting CRC would be cyclic with a subgroup smaller than
. The effective
length of the CRC would be the difference between the highest- and lowest-order terms. Therefore, the highest- and
lowest-order terms
and
should always appear in the polynomial.
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