MAX32665-MAX32668 User Guide
Maxim Integrated Page 247 of 457
11.3 Architecture
The ADC is a first-order sigma-delta converter with a 10-bit output. The ADC operates at a maximum frequency of 8MHz
with a fixed-sample rate as shown in Equation 11-1. Details of selecting the ADC clock frequency, f
adcclk
, are covered in the
Clock Configuration section.
Equation 11-1: ADC 10-bit Word Sample Rate
ADC offset and gain errors are factory trimmed and automatically loaded into the ADC controller during system power-up.
Gain error is trimmed to null out the total errors of the ADC and internal reference.
The ADC uses a switched capacitor network to perform the conversion; this results in dynamic switching current and
requires settling time for the external analog input signals (AIN0 – AIN7). This dynamic switching current sets the upper
limit of the source impedance of the external analog input signals to approximately 10kΩ.
The ADC supports a gain of 2 to provide additional conversion resolution if the input signals are less than half the
reference voltage.
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