Maxim Integrated MAX32665 - Table 6-2: MAX32665-MAX32668 GPIO and Alternate Function Matrix, 140 WLP

MAX32665-MAX32668 User Guide
Maxim Integrated Page 120 of 457
Table 6-2 shows the alternate functions mapped to each GPIO pin.
Table 6-2: MAX32665—MAX32668 GPIO and Alternate Function Matrix, 140 WLP
GPIO Port[pin]
GPIO
ALTERNATE
FUNCTION 1
ALTERNATE
FUNCTION 2
ALTERNATE
FUNCTION 3
ALTERNATE
FUNCTION 4
GPIO0[0]
P0.0
SPIXF_SS0
UART2_CTS
TMR0
GPIO0[1]
P0.1
SPIXF_MOSI/SDIO0
UART2_TX
TMR1
GPIO0[2]
P0.2
SPIXF_MISO/SDIO1
UART2_RX
TMR2
GPIO0[3]
P0.3
SPIXF_SCK
UART2_RTS
TMR3
GPIO0[4]
P0.4
SPIXF_SDIO2
OWM_IO
TMR4
GPIO0[5]
P0.5
SPIXF_SDIO3
OWM_PE
TMR5
GPIO0[6]
P0.6
I2C0_SCL
SWDIO2
TMR0
GPIO0[7]
P0.7
I2C0_SDA
SWCLK2
TMR1
GPIO0[8]
P0.8
SPIXR_SS0
QSPI0_SS0
UART0_CTS
TMR2
GPIO0[9]
P0.9
SPIXR_MOSI/SDIO0
QSPI0_MOSI/SDIO0
UART0_TX
TMR3
GPIO0[10]
P0.10
SPIXR_MISO/SDIO1
QSPI0_MISO/SDIO1
UART0_RX
TMR4
GPIO0[11]
P0.11
SPIXR_SCK
QSPI0_SCK
UART0_RTS
TMR5
GPIO0[12]
P0.12
SPIXR_SDIO2
QSPI0_SDIO2
OWM_IO
TMR0
GPIO0[13]
P0.13
SPIXR_SDIO3
QSPI0_SDIO3
OWM_PE
TMR1
GPIO0[14]
P0.14
I2C1_SCL
QSPI0_SS1
TMR2
GPIO0[15]
P0.15
I2C1_SDA
QSPI0_SS2
TMR3
GPIO0[16]
P0.16
AIN0/AIN0N
QSPI1_SS0
OWM_IO
TMR4
GPIO0[17]
P0.17
AIN1/AIN0P
QSPI1_MOSI/SDIO0
OWM_PE
TMR5
GPIO0[18]
P0.18
AIN2/AIN1N
QSPI1_MISO/SDIO1
TMR0
GPIO0[19]
P0.19
AIN3/AIN1P
QSPI1_SCK
TMR1
GPIO0[20]
P0.20
AIN4/AIN2N
QSPI1_SDIO2
UART1_RX
TMR2
GPIO0[21]
P0.21
AIN5/AIN2P
QSPI1_SDIO3
UART1_TX
TMR3
GPIO0[22]
P0.22
AIN6/AIN3N
QSPI1_SS1
UART1_CTS
TMR4
GPIO0[23]
P0.23
AIN7/AIN3P
QSPI1_SS2
UART1_RTS
TMR5
GPIO0[24]
P0.24
PCM_LRCLK
QSPI2_SS0
OWM_IO
TMR0
GPIO0[25]
P0.25
PCM_DOUT
QSPI2_MOSI/SDIO0
OWM_PE
TMR1
GPIO0[26]
P0.26
PCM_DIN
QSPI2_MISO/SDIO1
TMR2
GPIO0[27]
P0.27
PCM_BCLK
QSPI2_SCK
TMR3
GPIO0[28]
P0.28
PDM_DATA2
QSPI2_SDIO2
UART2_RX
TMR4
GPIO0[29]
P0.29
PDM_DATA3
QSPI2_SDIO3
UART2_TX
TMR5
GPIO0[30]
P0.30
PDM_RX_CLK
QSPI2_SS1
UART2_CTS
TMR0
GPIO0[31]
P0.31
PDM_MCLK
QSPI2_SS2
UART2_RTS
TMR1
GPIO1[0]
P1.0
SDHC_DAT3
SDMA_TMS
PT0
GPIO1[1]
P1.1
SDHC_CMD
SDMA_TDO
PT1
GPIO1[2]
P1.2
SDHC_DAT0
SDMA_TDI
PT2
GPIO1[3]
P1.3
SDHC_CLK
SDMA_TCK
PT3
GPIO1[4]
P1.4
SDHC_DAT1
UART0_RX
PT4
GPIO1[5]
P1.5
SDHC_DAT2
UART0_TX
PT5
GPIO1[6]
P1.6
SDHC_WP
UART0_CTS
PT6