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Maxim Integrated MAX32665 User Manual

Maxim Integrated MAX32665
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MAX32665-MAX32668 User Guide
Maxim Integrated Page 125 of 457
To enable low power mode wakeup (SLEEP, DEEPSLEEP and BACKUP) using an external GPIO interrupt, complete the
following steps:
1. Clear pending interrupt flags by writing to GPIOn_INT_CLR[pin].
2. Activate the GPIO wakeup function by writing 1 to GPIOn_WAKE_EN[pin].
3. Configure the power manager to use the GPIO as a wakeup source by setting the appropriate .gpiowken field to 1.
6.4 Registers
Each GPIO port has a unique base address as shown in Table 3-1: APB Register Base Address Map. Unless specified
otherwise, all fields are reset on a system reset, soft reset, POR, and the peripheral-specific reset, if applicable.
Table 6-8: GPIO Register Summary
Offset
Register
Name
[0x0000]
GPIOn_EN0
GPIO Port n Configuration Enable Bit 0 Register
[0x0004]
GPIOn_EN0_SET
Atomic set for GPIOn_EN0 register
[0x0008]
GPIOn_EN0_CLR
Atomic clear for for GPIOn_EN0 register
[0x000C]
GPIOn_OUT_EN
GPIO Port n Output enable register
[0x0010]
GPIOn_OUT_EN_SET
Atomic set for GPIOn_OUT_EN register
[0x0014]
GPIOn_OUT_EN_CLR
Atomic clear for GPIOn_OUT_EN register
[0x0018]
GPIOn_OUT
GPIO Port n Output register
[0x001C]
GPIOn_OUT_SET
Atomic set for GPIOn_OUT register
[0x0020]
GPIOn_OUT_CLR
Atomic clear for GPIOn_OUT register
[0x0024]
GPIOn_IN
GPIO Port n Input register
[0x0028]
GPIOn_INT_MODE
GPIO Port n Interrupt mode register
[0x002C]
GPIOn_INT_POL
GPIO Port n Interrupt polarity register
[0x0030]
GPIOn_IN_EN
GPIO Port n Input enable register
[0x0034]
GPIOn_INT_EN
GPIO Port n Interrupt enable register
[0x0038]
GPIOn_INT_EN_SET
Atomic set for GPIOn_INT_EN register
[0x003C]
GPIOn_INT_EN_CLR
Atomic clear for GPIOn_INT_EN register
[0x0040]
GPIOn_INT_STAT
GPIO Port n Interrupt status register
[0x0048]
GPIOn_INT_CLR
Atomic clear for GPIOn_INT_STAT register
[0x004C]
GPIOn_WAKE_EN
GPIO Port n Wake from DEEPSLEEP enable register
[0x0050]
GPIOn_WAKE_EN_SET
Atomic set for GPIOn_WAKE_EN register
[0x0054]
GPIOn_WAKE_EN_CLR
Atomic clear for GPIOn_WAKE_EN register
[0x005C]
GPIOn_INT_DUAL_EDGE
GPIO Port n Interrupt dual edge register
[0x0060]
GPIOn_PDPU_SEL0
GPIO Port n Input mode selection register 0
[0x0064]
GPIOn_PDPU_SEL1
GPIO Port n Input mode selection register 1
[0x0068]
GPIOn_EN1
GPIO Port n Configuration Enable Bit 1 Register
[0x006C]
GPIOn_EN1_SET
Atomic Set for GPIOn_EN1 register
[0x0070]
GPIOn_EN1_CLR
Atomic Clear for GPIOn_EN1 register
[0x0074]
GPIOn_EN2
GPIO Port n Configuration Enable Bit 2 Register
[0x0078]
GPIOn_EN2_SET
Atomic Set for GPIOn_EN2 register
[0x007C]
GPIOn_EN2_CLR
Atomic Clear for GPIOn_EN0 register
[0x00B0]
GPIOn_DS_SEL0
GPIO Port n Output Drive strength selection register 0

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Maxim Integrated MAX32665 Specifications

General IconGeneral
BrandMaxim Integrated
ModelMAX32665
CategoryMotherboard
LanguageEnglish