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Maxim Integrated MAX32665 User Manual

Maxim Integrated MAX32665
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MAX32665-MAX32668 User Guide
Maxim Integrated Page 54 of 457
4.2 Operating Modes
The MAX32665MAX32668 provides four operating modes:
ACTIVE
SLEEP
DEEPSLEEP
BACKUP
ACTIVE is the highest performance operating mode. Any low power state can wake up to ACTIVE by a wakeup event shown
in Table 4-1.
Table 4-1: Wakeup Sources
OPERATING MODE
WAKEUP SOURCE
SLEEP
Interrupts (RTC, GPIO, USB, Comparators), RSTN assertion, Wakeup
Timer.
DEEPSLEEP
Interrupts (RTC, GPIO, USB, Comparators), RSTN assertion, Wakeup
Timer.
BACKUP
Interrupts (RTC, GPIO, USB, Comparators), RSTN assertion, Wakeup
Timer.
The Arm Cortex-M family of CPUs have two built-in low power modes, designated SLEEP and DEEPSLEEP. Implementation of
these low-power modes are specific to the microcontroller’s design. These modes are enabled using the System Control
Register (SCR), an Arm Cortex System Control Block register. Write register bit SCR.deepsleep to select the low power mode
as shown in the pseudocode below.
SCR.sleepdeep = 0; // SLEEP mode enabled
SCR.sleepdeep = 1; // DEEPSLEEP mode enabled
Once enabled, the device enters the enabled low power mode when either a WFI (Wait For Interrupt) or WFE (Wait For
Event) instruction is executed.
Refer to the Arm Cortex-M4 core reference for more information on SCR.
4.2.1 ACTIVE Mode
This is the highest performance mode. All internal clocks, registers, memory, and peripherals are enabled. The CPU is
running and executing application code. All oscillators are available.
Dynamic clocking allows firmware to selectively enable or disable clocks and power to individual peripherals, providing the
optimal mix of high-performance and power conservation. Internal RAM that can be enabled, disabled, or placed in low-
power RAM Retention Mode include data SRAM memory blocks, on-chip caches, and on-chip FIFOs.
4.2.2 SLEEP Low Power Mode
This is a low power mode that suspends the CPU with a fast wakeup time to ACTIVE mode. It is like ACTIVE mode except the
CPU clock is disabled, which temporarily prevents the CPU from executing code. All oscillators remain active if enabled and
the Always On Domain (AOD) and RAM retention is enabled.
The device returns to ACTIVE mode from any internal or external interrupt.
The following pseudocode places the device in SLEEP mode:
SCR.sleepdeep = 0; // SLEEP mode enabled
WFI (or WFE); // Enter the low power mode enabled by SCR.sleepdeep
Figure 4-3, below, shows the clocks available and blocks disabled during SLEEP mode.

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Maxim Integrated MAX32665 Specifications

General IconGeneral
BrandMaxim Integrated
ModelMAX32665
CategoryMotherboard
LanguageEnglish