MAX32665-MAX32668 User Guide
Maxim Integrated Page 185 of 457
Non-DAT (No Data) Transfer
8.5.5 SDHC Registers
See Table 3-1: APB Peripheral Base Address Map for the SDHC Peripheral Base Address
Table 8-45: SDHC Register Offsets, Names and Descriptions
SDMA System Address / Argument 2
Buffer Data Port register
Block Gap Control register
Normal Interrupt Status register
Error Interrupt Status register
Normal Interrupt Status Enable register
Error Interrupt Status Enable register
Normal Interrupt Signal Enable register
Error Interrupt Signal Enable register
Auto CMD Error Status register
Maximum Current Capabilities register