MAX32665-MAX32668 User Guide
Maxim Integrated Page 404 of 457
Endpoints support four different types of data transfers:
• Control Endpoint – Always uses Endpoint 0, this endpoint is used by the USB Host to setup the USB Device for the
USB Device to receive operational status from the USB Host.
• Interrupt Endpoints – Used to send and receive non-time critical data to and from a USB Device. An application
example is a USB keyboard or a USB mouse.
• Bulk Endpoints – Used to send and receive high-volume data that does not require real-time processing. An
application example is a USB flash drive which transfers high volume data.
• Isochronous Endpoints – Used to send or receive real-time data that requires a guaranteed bandwidth to or from a
Host. An application example is a video camera used for real-time video streaming.
The USBHS supports Control, Interrupt, Bulk, and Isochronous Endpoints. Per the USB 2.0 Specification, Endpoint 0 is
dedicated to Control Transfers only.
Endpoint directions are always defined from a USB Host to a USB Device. OUT Endpoint 1 refers to a Device Endpoint
holding data sent out from a USB Host to a USB Device. IN Endpoint 2 refers to a Device Endpoint holding data sent from a
USB Device to a USB Host.
Each USBHS Data Endpoint supports the following features:
• Single or double buffered
• Programmable and flexible interrupts
• Ability to send a STALL packet to the Host to indicate an error with the data
• Ability to automatically send an ACK packet to the Host to acknowledge a successful data transfer
• Ability to send a NYET (Not Yet) packet to the Host for Hi-Speed transfers to indicate it is not yet ready to receive
more data
• Configurable response to Status Stage of Control transfer
21.4 USBHS Reset and Clock
When a RESET state is detected on the bus, the USBHS performs the following actions:
1. Sets USBHS_FADDR.addr = 0
2. Sets USBHS_INDEX = 0
3. All endpoint FIFOs are flushed
4. All control and status registers are reset
5. The USB PHY is electrically disconnected from the bus
6. All endpoint interrupts are enabled
7. Generates a USB Reset IRQ
For correct operation of the USBHS interface, the system clock, f
SYS_CLK ,
must be no less than 32MHz.
21.5 USBHS SUSPEND Mode and RESUME States
When the USBHS sees no activity on the bus for 3ms, and if SUSPEND mode is allowed (USBHS_POWER.suspendm = 1), then
the USBHS goes into low-power SUSPEND mode. The SUSPEND status flag is set (USBHS_INTSIGFL.suspend = 1), and a
SUSPEND interrupt is generated if enabled (USBHS_INTSIGEN.suspend = 1).
Firmware can exit SUSPEND mode by sending a RESUME state on the bus by setting the bit field USBHS_POWER.resume = 1.
Firmware must leave this bit set between 2ms and 15ms with 10ms being the optimal time after which firmware must clear
the resume bitfield.
If the external Host generates a RESUME state on the bus, a RESUME interrupt is generated. A RESUME interrupt is not
generated if the RESUME state on the bus is caused by firmware setting the USBHS_POWER.resume bit.
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