Maxim Integrated MAX32665 - Table 3-3: Error Correction Coding (ECC) Enable Register; Table 3-4: Error Correction Coding (ECC) Error Register

MAX32665-MAX32668 User Guide
Maxim Integrated Page 44 of 457
Table 3-3: Error Correction Coding (ECC) Enable Register
Error Correction Coding Enable
GCR_ECC_EN
[0x6C00]
Bits
Field
Access
Reset
Description
31:13
-
RO
0
Reserved for Future Use
Do not modify this field.
12
fl1eccen
R/W
0
Flash1 ECC Enable
0: Disable
1: Enable
11
fl0eccen
R/W
0
Flash0 ECC Enable
0: Disable
1: Enable
10
Icspixfeccen
R/W
0
ICacheXIP ECC Enable
0: Disable
1: Enable
9
ic1eccen
R/W
0
ICache1 ECC Enable
0: Disable
1: Enable
8
ic0eccen
R/W
0
ICache0 ECC Enable
0: Disable
1: Enable
7:6
-
RO
0
Reserved for Future Use
Do not modify this field.
5
sysram5en
R/W
0
Sysram5 ECC Enable
0: Disable
1: Enable
4
sysram4en
R/W
0
Sysram4 ECC Enable
0: Disable
1: Enable
3
sysram3en
R/W
0
Sysram3 ECC Enable
0: Disable
1: Enable
2
sysram2en
R/W
0
Sysram2 ECC Enable
0: Disable
1: Enable
1
sysram1en
R/W
0
Sysram1 ECC Enable
0: Disable
1: Enable
0
sysram0en
R/W
0
Sysram0 ECC Enable
0: Disable
1: Enable
Table 3-4: Error Correction Coding (ECC) Error Register
Error Correction Coding Error
GCR_ECC_ER
[0x0064]
Bits
Field
Access
Reset
Description
31:13
-
RO
0
Reserved for Future Use
Do not modify this field.