Maxim Integrated MAX32665 - Table 20-10: OWM Interrupt Enable Register

MAX32665-MAX32668 User Guide
Maxim Integrated Page 401 of 457
OWM Interrupt Flag Register
OWM_INTFL
[0x0010]
Bits
Field
Access
Reset
Description
1
tx_data_empty
R/W1C
0
TX Empty
The OWM hardware automatically sets this interrupt flag when the data
transmit is complete. Write 1 to clear this flag.
0: Either no data was sent or the data in the OWM_DATA.tx_rx field has not
completed transmission.
1: Data in the OWM_DATA.tx_rx field was transmitted.
0
ow_reset_done
R/W1C
0
Reset Complete
This flag is set when a 1-Wire reset sequence completes. To start a 1-Wire reset
sequence, see OWM_CTRL_STAT.start_ow_reset. Write 1 to clear this flag.
0: 1-Wire reset sequence not complete or bus idle.
1: 1-Wire reset sequence complete.
Table 20-10: OWM Interrupt Enable Register
OWM Interrupt Enable Register
OWM_INTEN
[0x0014]
Bits
Field
Access
Reset
Description
31:5
-
RO
0
Reserved for Future Use
Do not modify this field.
4
line_low
R/W
0
Line Low Interrupt Enable
I/O pin low detected interrupt enable.
0: Interrupt disabled.
1: Interrupt enabled.
3
line_short
R/W
0
Line Short Interrupt Enable
I/O pin short detected interrupt enable.
0: Interrupt disabled.
1: Interrupt enabled.
2
rx_data_ready
R/W
0
Receive Data Ready Interrupt Enable
RX data ready interrupt enable.
0: Interrupt disabled.
1: Interrupt enabled.
1
tx_data_empty
R/W
0
Transmit Data Empty Interrupt Enable
TX data empty interrupt enable.
0: Interrupt disabled.
1: Interrupt enabled.
0
ow_reset_done
R/W
0
1-Wire Reset Sequence Complete Interrupt Enable
1-Wire reset sequence completed.
0: Interrupt disabled.
1: Interrupt enabled.