Maxim Integrated MAX32665 - Table 4-26: High Side FET Peak Current VREGO_C VREGO_D Register; Table 4-27: Maximum High Side FET Time on Register; Table 4-28: Buck Cycle Count VREGO_A Register; Table 4-29: Buck Cycle Count VREGO_B Register

MAX32665-MAX32668 User Guide
Maxim Integrated Page 75 of 457
High Side FET Peak Current VREGO_A VREGO_B
IPKA
[0x0014]
Bits
Field
Access
Reset
Description
7:4
ipksetb
R/W
0x8h
Reserved
Reserved. Do not modify this field.
3:0
ipkseta
R/W
0x8h
Reserved
Reserved. Do not modify this field.
Table 4-26: High Side FET Peak Current VREGO_C VREGO_D Register
High Side FET Peak Current VREGO_C VREGO_D
IPKB
[0x0018]
Bits
Field
Access
Reset
Description
31:8
-
R/W
-
Reserved
Do not modify this field.
7:4
ipksetd
R/W
0x8h
Reserved
Reserved. Do not modify this field.
3:0
ipksetc
R/W
0x8h
Reserved
Reserved. Do not modify this field.
Table 4-27: Maximum High Side FET Time On Register
Maximum High Side FET Time On
MAXTON
[0x001C]
Bits
Field
Access
Reset
Description
31:4
-
R/W
-
Reserved
Do not modify this field.
3:0
tonset
R/W
0x8h
Reserved
Reserved. Do not modify this field.
Table 4-28: Buck Cycle Count VREGO_A Register
Buck Cycle Count VREGO_A
ILOAD_A
[0x0020]
Bits
Field
Access
Reset
Description
31:8
-
RO
-
Reserved
Do not modify this field.
7:0
iloada
RO
0
Reserved
Reserved. Do not modify this field.
Table 4-29: Buck Cycle Count VREGO_B Register
Buck Cycle Count VREGO_B
ILOAD_B
[0x0024]
Bits
Field
Access
Reset
Description
31:8
-
RO
-
Reserved
Do not modify this field.
7:0
iloadb
RO
0
Reserved
Reserved. Do not modify this field.