MAX32665-MAX32668 User Guide
Maxim Integrated Page 239 of 457
When found in literature, sometimes the LSB or MSB of the polynomial is omitted when the polynomial is written in binary.
It is more common to see CRC polynomials with the MSB implied because that is the bit that is shifted off, XOR’d with the
data, and tested to see if the result is set. Some literature assumes the reader knows that an n-bit CRC must have the
term set, or else it would be a smaller length CRC.
Some common CRC polynomials and their check constants are shown in Table 10-1. The polynomial register resets to the
32-bit CRC polynomial used by Ethernet, PPP, and file compression utilities such as zip or gzip.
By default, the CRC accelerator does right shifts and calculates the CRC on the LSB of the data first. The CRC can be
calculated on the most significant bit (MSB) of the data first by setting the bit-swap control bit to 1 (CRC_CTRL.msb = 1). To
calculate the CRC MSB first, you must left justify the polynomial in the CRC_POLY register. The hardware implies the MSB of
the polynomial just as it did when shifting the LSB first. The LSB of the polynomial should be set, this defines the length of
the CRC. The initial state of the CRC should also be left justified. When the CRC calculation is complete, it is necessary to
right shift the CRC to right justify it if the polynomial is less than 32 bits.
Table 10-1: Common CRC Polynomials
10.1 Instances
There is one instance of this peripheral.
10.2 Linear Feedback Shift Register (LFSR)
Linear Feedback Shift Registers (LFSRs) are commonly used to implement Pseudo-Random Number Generators (PRNGs). An
LFSR polynomial can be written to the CRC_POLY register to generate pseudo-random data. The starting state or seed for
the pseudo-random sequence should be written to the CRC register. The lockup state of all zeros is detected, and the LFSR
substitutes the value 1 to prevent lockup.
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