MAX32665-MAX32668 User Guide
Maxim Integrated Page 367 of 457
Table 17-10: Pulse Train n Loop Configuration Register
Pulse Train Loop Configuration
Reserved for Future Use
Do not modify this field from its default value.
Pulse Train Delay Between Loops
Sets the delay, in number of Peripheral Clock cycles, that the output pauses between
loops. The bitfield count is decremented after the delay.
If firmware writes a 0 to bitfield count, this field is ignored.
Pulse Train Loop Countdown
Sets the number of times a pulse train pattern is repeated until it automatically stops.
Reading this field returns the number of loops remaining.
When this field counts down to zero, the corresponding PTn_INTFL flag is set.
Write 0 to have the pulse train pattern repeat indefinitely.
Ignored in Square Wave mode.
Table 17-11: Pulse Train n Automatic Restart Configuration Register
Pulse Train Automatic Restart Configuration
Reserved for Future Use
Do not modify this field from its default value.
Enable Automatic Restart for This Pulse Train on PTy Stop Event
0: Disable automatic restart
1: When PTy has a Stop Event, automatically restart this pulse train from the
beginning of its pattern.
Reserved for Future Use
Do not modify this field from its default value.
Select PTy
Select the pulse train number to be associated with PTy. This engine must be in pulse
train mode.
0b00000: PT0
0b00001: PT1
0b00010: PT2
0b00011: PT3
0b00100: PT4
0b00101: PT5
0b00110: PT6
0b00111: PT7
0b01000: PT8
0b01001: PT9
0b01010: PT10
0b01011: PT11
0b01100: PT12
0b01101: PT13
0b01110: PT14
0b01111: PT15
0b1xxxx: Reserved.
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