Maxim Integrated MAX32665 - Table 8-72: SDHC Software Reset Register

MAX32665-MAX32668 User Guide
Maxim Integrated Page 202 of 457
Table 8-72: SDHC Software Reset Register
Software Reset Register
SDHC_SW_RESET
[0x002F]
Bits
Name
Access
Reset
Description
7:3
-
R/W
0
Reserved for Future Use
Do not modify this field.
2
reset_dat
RWAC
0
Software Reset for DAT Line
1: Reset
0: Ready
The following registers and fields are cleared/initialized when this bit is set:
Register
Field
SDHC_BUFFER
data
SDHC_PRESENT
buffer_read
buffer_write
read_transfer
write_transfer
dat_line_active
dat
cmd
SDHC_BLK_GAP
cont
stop
SDHC_INT_STAT
buff_rd_ready
buff_wr_ready
dma
blk_gap_event
trans_comp
Note: After setting this bit to 1, the Card Driver must poll this bit until it reads 0 to
determine reset completion.
1
reset_cmd
RWAC
0
Software Reset for CMD Line
1: Reset
0: Ready
The following registers and fields are cleared by setting this bit.
Register
Field
SDHC_PRESENT
cmd
SDHC_INT_STAT
cmd_comp
Note: After setting this bit to 1, the card driver must poll this bit for 0 to determine
when the reset is complete.
0
reset_all
RWAC
0
Software Reset for All
Reset the SDHC except for the card detection interface. All registers are reset to
their Reset/POR state.
1: Reset
0: Ready
Note: After the Card Driver sets this bit to 1, the Card Driver should poll this bit until
it reads 0 to determine when the SDHC completes the reset all request.