MAX32665-MAX32668 User Guide
Maxim Integrated Page 324 of 457
15. HTimer (HT)
15.1 Overview
The HTimer (HT) is a 40-bit binary timer similar to the real-time clock but is driven by a high-speed internal clock source.
The timer provides a short-interval, auto-reload alarm and a long-interval alarm. Configurable alarm settings allow it to be
used as a low-power wakeup timer.
The HT clock source is the 7.768 MHz internal oscillator.
Two registers combine to create the timer. The HTIMER_SEC.rts field contains the most significant bits and the
HTIMER_SSEC.rtss field contains the least significant bits. The HTIMER_SEC.rts field is incremented each time
HTIMER_SSEC.rtss rolls over.
The peripheral does not have a dedicated clock output equivalent to the 32KCAL.
A programmable long-interval alarm is usable with HTIMER_SEC.rts to provide a single event/alarm timer. When the
counter is started, it counts continuously unless it is disabled, and reads of the counter registers do not affect the count.
A separate 32-bit auto-reload short-interval alarm counter register (HTIMER_RSSA) can generate repeating interval alarms.
15.2 Alarm Functions
The timer provides two alarm functions:
The long interval alarm is generated when HTIMER_RAS.ras matches HTIMER_SEC.rts[19:0].
The short-interval alarm provides an internal 32-bit auto-reload counter that increments on each transition of
HTIMER_SSEC.rtss. The counter always increments from the value in HTIMER_RSSA.rssa up to the maximum value of
HTIMER_SSEC.rtss. When the internal counter rolls over to 0, an alarm is generated, the internal counter is reloaded with
HTIMER_RSSA.rssa and continues incrementing.
15.2.1 Long-Interval Alarm
The long interval counter increments once each time HTIMER_SSEC.rtss rolls over to 0. The alarm is triggered when the
HTIMER_SEC.rts[19:0] matches HTIMER_RAS.ras. Hardware will then set the HTIMER_RAS.tod_fl bit and an interrupt will be
generated if software has set HTIMER_RAS.tod_en.
You must disable the long-interval alarm before changing the HTIMER_RAS.tod field.
15.2.2 Short-Interval Alarm
The HTIMER_RSSA.rts and HTIMER_CTRL.alarm_ss_en fields control the short-interval alarm. Writing HTIMER_RSSA sets the
starting value for the short-interval alarm counter. Writing the Short-Interval Alarm Enable (HTIMER_CTRL.alarm_ss_en) bit
to 1 enables the short-interval alarm. Once enabled, the short-interval alarm begins up-counting from the HTIMER_RSSA
value. When the counter rolls over from 0xFFFF FFFF to 0x0000 0000, hardware sets the HTIMER_CTRL.alarm_ss_fl bit
triggering the alarm. At the same time, hardware also reloads the counter with the value previously written to
HTIMER_RSSA.rssa.
You must disable the short-interval interval alarm, HTIMER_CTRL.alarm_ss_en, prior to changing the interval alarm value,
HTIMER_RSSA.
The delay (uncertainty) associated with enabling the short-interval alarm is propagated to the first interval alarm.
Thereafter, if the interval alarm remains enabled, the alarm triggers after each short-interval interval as defined without the
first alarm uncertainty because the short-interval alarm is an auto-reload timer. Enabling the short-interval alarm with the
short-interval alarm register set to 0 (HTIMER_RSSA.rssa = 0) results in the maximum short-interval alarm interval.