MAX32665-MAX32668 User Guide
Maxim Integrated Page 336 of 457
16.7 PWM Mode (011b)
In PWM mode, the timer sends a Pulse-Width Modulated (PWM) output using the timer’s output signal. The timer first
counts up to the match value stored in the TMRn_PWM register. At the end of the cycle where the TMRn_CNT value
matches the TMRn_PWM value, the timer’s output toggles state. The timer continues counting until it reaches the
TMRn_CMP value.
16.7.1 PWM Mode Timer Period
The timer period ends on the rising edge of PCLK following TMRn_CNT = TMRn_CMP.
The timer peripheral automatically performs the following actions at the end of the timer period:
1. The TMRn_CNT is reset to 0x0000 0001, and the timer resumes counting.
2. The timer output signal is toggled.
3. The timer interrupt bit TMRn_INT.irq will be set. An interrupt will be generated if enabled.
When TMRn_CN.tpol = 0, the timer output signal starts low and then transitions to high when the TMRn_CNT value
matches the TMRn_PWM value. The timer output signal remains high until the TMRn_CNT value reaches the TMRn_CMP
value, resulting in the timer output signal transitioning low, and the TMRn_CNT value resetting to 0x0000 0001.
When TMRn_CN.tpol = 1, the Timer output signal starts high and transitions low when the TMRn_CNT value matches the
TMRn_PWM value. The timer output signal remains low until the TMRn_CNT value reaches the TMRn_CMP value, resulting
in the timer output signal transitioning high, and the TMRn_CNT value resetting to 0x0000 0001.
16.7.2 PWM Mode Configuration
Complete the following steps to configure a timer for PWM mode and initiate the PWM operation:
1. Set TMRn_CN.ten = 0 to disable the timer.
2. Set TMRn_CN.tmode to 011b to select PWM mode.
3. Set TMRn_CN.pres3:TMRn_CN.pres to set the prescaler that determines the timer frequency.
4. Configure the timer pin:
5. Configure the pin as a timer input and configure the electrical characteristics as needed.
6. Set TMRn_CN.tpol to match the desired initial (inactive) state.
a. Set TMRn_CN.tpol to select the initial logic level (high or low) and PWM transition state for the timer’s output.
b. Set TMRn_CNT to the starting count, typically 0x0000 0001. The initial TMRn_CNT value only effects the initial
period in PWM mode with subsequent periods always setting TMRn_CNT to 0x0000 0001.
c. Set the TMRn_PWM value to the transition period count.
7. Set the TMRn_CMP value for the PWM second transition period. Note: TMRn_CMP must be greater than the
TMRn_PWM value.
8. Optionally enable the timer’s interrupt in the Interrupt Controller, and set the timer’s interrupt priority.
9. Set TMRn_CN.ten to 1 to enable the timer and start the PWM.
The PWM period is calculated using the following equation:
Equation 16-6: Timer PWM Period
If an initial starting value other than 0x0000 0001 is loaded into the TMRn_CNT register, use the One-Shot mode equation,
Equation 16-2, to determine the initial PWM period.
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