MAX32665-MAX32668 User Guide
Maxim Integrated Page 394 of 457
20.3.4 Match ROM and Overdrive Match ROM Commands
The Match ROM command is used by the OWM to select one and only one slave 1-Wire device when the ROM ID of the
device has already been determined. When transmitting this command, the master sends the command byte (that is, 55h
for standard speed and 69h for overdrive speed) and then sends the entire 64-bit ROM ID for the device selected, least
significant bit first.
During the transmission of the ROM ID by the master, all slave devices monitor the bus. As each bit is transmitted, each of
the slave devices compares it against the corresponding bit of their ROM ID. If the bits match, the slave device continues to
monitor the bus. If the bits do not match, the slave device transitions to the inactive state (waiting for a 1-Wire reset) and
stops monitoring the bus.
At the end of the transmission, at most one slave device is active, which is the slave device whose ROM ID matched the
ROM ID that was transmitted. All other slave devices are inactive. Communication then proceeds to the Transport layer for
the device that was selected.
The Overdrive Match ROM command operates in an identical manner except that it also causes the slave device that is
selected by the command to shift communication speed from standard speed to overdrive speed. The Overdrive Match
ROM command byte (69h) and the 64-bit ROM ID bits are transmitted at standard speed. All subsequent communication is
sent at overdrive speed.
20.3.5 Search ROM Command
The Search ROM command allows the OWM to determine the ROM ID values of all 1-Wire slave devices connected to the
bus using an iterative search process. Each execution of the Search ROM command reveals the ROM ID of one slave device
on the bus.
The operation of the Search ROM command resembles a combination of the Read ROM and Match ROM commands. First,
all slaves on the bus transmit the least significant bit (Bit 0) of their ROM IDs. Next, all slaves on the bus transmit a
complement of the same bit. By analyzing the two bits received, the master can determine whether the Bit 0 values were 0
for all slaves, 1 for all slaves, or a combination of the two. Next, the master selects which slaves remain activated for the
next step in the Search ROM process by transmitting the Bit 0 value for the slaves it selects. All slaves whose Bit 0 matches
the value transmitted by the master remain active, while slaves with a different Bit 0 value go to the inactive state and do
not participate in the remainder of the Search ROM command.
Next, the same process is followed for Bit 1, then Bit 2, and so on until the 63rd bit (most significant bit) of the ROM ID is
transmitted. At this point only one slave device remains active, and the master can either continue with communication at
the Transport layer or issue a 1-Wire reset pulse to go back for another pass at the Search ROM command.
The Book of iButton Standards goes into more detail about the process that is used by the master to obtain ROM IDs of all
devices on the 1-Wire bus using multiple executions of the Search ROM command. The algorithm resembles a binary tree
search and is used regardless of how many devices are on the bus.
There is no overdrive equivalent version of the Search ROM command.
20.3.6 Search ROM Accelerator Operation
To allow the Search ROM command to process more quickly, the OWM module provides a special accelerator mode for use
with the Search ROM command. This mode is activated by setting OWM_CTRL_STAT.sra_mode to 1.
When this mode is active, ROM IDs being processed by the Search ROM command are broken into 4-bit nibbles where the
current 64-bit ROM ID varies with each pass through the search algorithm. Each 4-bit processing step is initiated by writing
the 4-bit value to OWM_DATA.tx_rx. This causes the generation of twelve 1-Wire time slots by the OWM as each bit in the
4-bit value (starting with the LSB) results in a read of two bits (all active slaves transmitting bit N of their ROM IDs, then all
active slaves transmitting the complement of bit N of their ROM ID), and then a write of a single bit by the OWM.
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