Maxim Integrated MAX32665 - 3 Memory, Register Mapping, and Access; Memory, Register Mapping, and Access Overview

MAX32665-MAX32668 User Guide
Maxim Integrated Page 34 of 457
3. Memory, Register Mapping, and Access
3.1 Memory, Register Mapping, and Access Overview
The Arm Cortex-M4 architecture defines a standard memory space for unified code and data access. This memory space is
addressed in units of single bytes but is most typically accessed in 32-bit (4 byte) units. It may also be accessed, depending
on the implementation, in 8-bit (1 byte) or 16-bit (2 byte) widths. The total range of the memory space is 32 bits wide (4GB
addressable total), from addresses 0x0000 0000 to 0xFFFF FFFF.
It is important to note, however, that the architectural definition does not require the entire 4GB memory range to be
populated with addressable memory instances.