MAX32665-MAX32668 User Guide
Maxim Integrated Page 276 of 457
condition to abort the transfer, or it can generate a repeated START condition (that is, send a START condition without an
intervening STOP condition) to start a new transfer.
A receiver can generate a NACK after a byte transfer if any of the following conditions occur:
• No receiver is present on the bus with the transmitted address. In that case, no device will respond with an
acknowledge signal.
• The receiver is unable to receive or transmit because it is busy and is not ready to start communication with the
master.
• During the transfer, the receiver receives data or commands it does not understand.
• During the transfer, the receiver is unable to receive any more data.
• If an I
2
C master has requested data from a slave, it signals the slave to stop transmitting by sending a NACK
following the last byte it requires.
13.3.6 Bit Transfer Process
Both SDA and SCL circuits are open-drain, bidirectional circuits. Each requires an external pullup resistor that ensures each
circuit is high when idle. The I
2
C specification states that during data transfer, the SDA line can change state only when SCL
is low, and that SDA is stable and able to be read when SCL is high as shown in Figure 13-2, below.
Figure 13-2: I
2
C Write Data Transfer
An example of an I
2
C data transfer is as follows:
1. A bus master indicates a data transfer to a slave with a START condition.
2. The master then transmits one byte with a 7-bit slave address and a single read-write bit: a zero for a write or a
one for a read.
3. During the next SCL clock following the read-write bit, the master releases SDA. During this clock period, the
addressed slave responds with an ACK by pulling SDA low.
4. The master senses the ACK condition and begins transferring data. If reading from the slave, it floats SDA and
allows the slave to drive SDA to send data. After each byte, the master drives SDA low to acknowledge the byte. If
writing to the slave, the master drives data on the SDA circuit for each of the eight bits of the byte, and then floats
SDA during the ninth bit to allow the slave to reply with the ACK indication.
5. After the last byte is transferred, the master indicates the transfer is complete by generating a STOP condition. A
STOP condition is generated when the master pulls SDA from a low to high while SCL is high.