Maxim Integrated MAX32665 - 5 Interrupts and Exceptions; Features; Interrupt Vector Table; Table 5-1: MAX32665-MAX32668 Interrupt Vector Table

MAX32665-MAX32668 User Guide
Maxim Integrated Page 115 of 457
5. Interrupts and Exceptions
Interrupts and exceptions are managed by the Arm Cortex-M4 with FPU Nested Vector Interrupt Controller (NVIC). The
NVIC handles the interrupts, exceptions, priorities and masking. Table 5-1 details the MAX32665—MAX32668 interrupt
vector table and describes each exception and interrupt.
5.1 Features
• 59 maskable interrupts not including the 15 system exceptions of the Arm Cortex-M4 with FPU
• 8 programmable priority levels
• Nested exception and interrupt support
• Interrupt masking
5.2 Interrupt Vector Table
Table 5-1 lists the interrupt and exception table for the MAX32665—MAX32668. There are 95 interrupt entries for the
MAX32665—MAX32668, including reserved for future use interrupt place holders. Including the 15 system exceptions for
the Arm Cortex-M4 with FPU, the total number of entries is 110.
Table 5-1: MAX32665—MAX32668 Interrupt Vector Table
Exception
(Interrupt) Number
Offset
Name
Description
1
[0x0004]
Reset_Handler
Reset
2
[0x0008]
NMI_Handler
Non-Maskable Interrupt
3
[0x000C]
HardFault_Handler
Hard Fault
4
[0x0010]
MemManage_Handler
Memory Management Fault
5
[0x0014]
BusFault_Handler
Bus Fault
6
[0x0018]
UsageFault_Handler
Usage Fault
7:10
[0x001C]-[0x0028]
-
Reserved
11
[0x002C]
SVC_Handler
Supervisor Call Exception
12
[0x0030]
DebugMon_Handler
Debug Monitor Exception
13
[0x0034]
-
Reserved
14
[0x0038]
PendSV_Handler
Request Pending for System Service
15
[0x003C]
SysTick_Handler
System Tick Timer
16
[0x0040]
SysFault_IRQHandler
System Fault interrupt
17
[0x0044]
WDT0_IRQHandler
Watchdog Timer 0 Interrupt
18
[0x0048]
USB_IRQHandler
USB Interrupt
19
[0x004C]
RTC_IRQHandler
Real-Time Clock Interrupt
20
[0x0050]
-
Reserved