Maxim Integrated MAX32665 User Manual

MAX32665-MAX32668 User Guide
Maxim Integrated Page 449 of 457
CRC Control Register
CRC_CTRL
[0x000C]
BITS
NAME
ACCESS
RESET
DESCRIPTION
2
prng
R/W
0
PRNG Enable
This feature is not implemented in this device. Do not change this bit from its default
value.
1
msb
R/W
0
CRC MSB select
This bit selects the order of calculating CRC on data.
0: LSB data first
1: MSB data first
0
crc
R/W
0
Cyclic Redundancy Check Enable
This feature is not implemented in this device. Do not change this bit from its default
value.
0: CRC disabled
1: CRC enabled
Table 23-12: Cryptographic DMA Source Register
Cryptographic DMA Source Register
DMA_SRC
[0x0010]
BITS
NAME
ACCESS
RESET
DESCRIPTION
31:0
addr
R/W
0
DMA Source Address
DMA source address for cryptographic operations.
Table 23-13: Cryptographic DMA Destination Register
Cryptographic DMA Destination Register
DMA_DEST
[0x0014]
BITS
NAME
ACCESS
RESET
DESCRIPTION
31:0
addr
R/W
0
DMA Destination Address
DMA destination address for cryptographic operations.
Table 23-14: Cryptographic DMA Count Register
Cryptographic DMA Count Register
DMA_CNT
[0x0018]
BITS
NAME
ACCESS
RESET
DESCRIPTION
31:0
addr
R/W
0
DMA Byte Counter
DMA counter for cryptographic operations. Writing a non-zero value to this register
initiates DMA-based operations.
Table 23-15: MAA Control Register
MAA Control Register
MAA_CTRL
[0x001C]
BITS
NAME
ACCESS
RESET
DESCRIPTION
31:28
tma
R/W
0
Temporary MAA Memory Assignment
These bits select the logical cryptographic RAM segment for parameter t.
SETTINGS
SEGMENT
MAWS < 1024
MAWS ≥ 1024
0b0000
0b0000
0
0b0001
0b0010
1
0b0010
0b0100
2
0b0011
0b0110
3
0b0100
0b1000
4
0b0101
N/A
5
0b0111
N/A
6

Maxim Integrated MAX32665 Specifications

General

Brand	Maxim Integrated
Model	MAX32665
Category	Motherboard
Language	English