Maxim Integrated MAX32665 - Figure 11-1: Analog to Digital Converter Block Diagram

MAX32665-MAX32668 User Guide
Maxim Integrated Page 248 of 457
Figure 11-1: Analog to Digital Converter Block Diagram
INTERNAL
REFERENCE
APB
V
REGI
÷4
V
RXOUT
V
TXOUT
V
DDB
÷4
V
COREA
V
COREB
1.22V
V
DDA
ADC_CTRL
ref_sel
ENABLE
ADC_CTRL
ref_scale
REFERENCE
SELE CT
REFERENCE
DIV 2
REFERENCE
ANALOG
INPUT
CLOCK
PERIPHE RAL
CLOCK
ENABLE
adc_done_ie
ADC_IRQ
INTERRUPT
adc_done_if = 1
START COMPLETE

MODULATOR
ADC CONTROL
(ADC_CTRL)
LIMIT CONTROL
ENGINE
ADC_CTRL
adc_ pwr
ADC_CTRL
refbuf_pwr
ADC_CTRL
adc_ ch_sel[4:0]
ADC_CTRL
adc_ sca le
ADC_CTRL
adc_ start
ADC_CTRL
adc_ clk_en
f
adcclk
8MHz MA XIMUM
INPUT SCALE
DIV 2
V
DDIO
V
DDIOH
11
10
9
8
7
6
5
4
3
2
1
0
÷4
÷4
ADC Clock
Divider
GCR_PCKDIV
adcfrq
ADC_CTRL
chargepump_pwr
CHARGEPUMP
15
14
13
12
16
AIN3/AIN1N
AIN2/AIN1P
AIN1/AIN0N
AIN0/AIN0P
AIN7/AIN3N
AIN6/AIN3P
AIN5/AIN2N
AIN4/AIN2P
GPIO Alternate Function Multiplexer
V
DDA
EXTERNAL INPUT SCALE
ADC_CTRL
adc_ divsel[1 :0]
ADC LIMIT 0
(ADC_LIMIT0)
ADC LIMIT 1
(ADC_LIMIT1)
ADC LIMIT 2
(ADC_LIMIT2)
ADC LIMIT 3
(ADC_LIMIT3)
ADC STATUS
(ADC_STATUS)
ADC DATA
(ADC_DATA)
ADC INTERRUPT
(ADC_INTR)
8
AINnP
AINnN
MCR_AINCOMP
aincompnpd
PWRSEQ_LPPWEN
aincompnwken
GCR_PMR
compwken
COMPARATOR_IRQ
4
COMPARATORS