Maxim Integrated MAX32665 - Table 4-62: System Status Flag Register; Table 4-63: Reset Register 1

MAX32665-MAX32668 User Guide
Maxim Integrated Page 100 of 457
Memory Zeroization Control
GCR_MEM_ZERO
[0x002C]
Bits
Field
Access
Reset
Description
1
sram1z
R/W1
0
Sysram1 Zeroization
Write 1 to initiate the operation.
0: Operation complete.
1: Operation in progress.
0
sram0z
R/W1
0
Sysram0 Zeroization
Write 1 to initiate the operation.
0: Operation complete.
1: Operation in progress.
Table 4-62: System Status Flag Register
System Status Flag
GCR_SYS_STAT
[0x0040]
Bits
Field
Access
Reset
Description
31:6
-
RO
0
Reserved
Do not modify this field.
5
scmemf
RO
0
SRCC Cache Memory Error Status Flag
Indicates a memory fault has occurred in the cache while receiving data from the SPIXR
interface.
0: Normal operation
1: SPIXR cache memory fault
4:2
-
RO
0
Reserved
Do not modify this field.
1
codeinterr
R/W1C
0
Flash SPIXF Code Integrity Error Status Flag
Write 1 to clear this field. This indicates a code integrity error has occurred in the Flash
SPI-XIPF interface.
0: Error detected
1: No error.
0
icelock
RO
0
Arm ICE Lock Status Flag
0: Arm ICE is unlocked (enabled)
1: Arm ICE is locked (disabled)
Table 4-63: Reset Register 1
Reset 1
GCR_RST1
[0x0044]
Bits
Field
Access
Reset
Description
31:26
-
RO
0
Reserved
Do not modify this field.
25
simo
R/W
0
Single Inductor Multiple Output Block Reset
Write 1 to initiate the operation.
0: Operation complete.
1: Operation in progress.
24
dvs
R/W
0
Dynamic Voltage Scaling Controller Reset
Write 1 to initiate the operation.
0: Operation complete.
1: Operation in progress.