MAX32665-MAX32668 User Guide
Maxim Integrated Page 61 of 457
Table 4-2: Reset and Low Power Mode Effects
Table key:
FW = Controlled by firmware
On = Enabled by hardware (Cannot be disabled)
Off = Disabled by hardware (Cannot be enabled)
- = No Effect
R = Restored to previous ACTIVE mode setting when exiting DEEPSLEEP, restored to System Reset state when exiting
BACKUP
1: The Always On Domain (AOD) is only reset on power-cycling VDDA and VCOREA.
2: On a System Reset or POR, the 60MHz Osc will automatically be selected as SYS_OSC.
3 A System Reset occurs when returning from BACKUP low-power mode.
4 Peripheral, Soft, and System Resets are initiated by firmware though the GCR_RST0 register. System Reset
can also be triggered by the RSTN device pin or Watchdog reset.
4.3.1 Peripheral Reset
This resets all peripherals. The CPU retains its state. The GPIO, Watchdog Timers, AoD, RAM retention, and General Control
Registers (GCR), including the clock configuration, are unaffected.
To start a Peripheral Reset, set GCR_RST0.periph_rst = 1. The reset will be completed immediately upon setting
GCR_RST0.periph_rst = 1.
4.3.2 Soft Reset
This is the same as a Peripheral Reset except that it also resets the GPIO to its Power-On Reset state.