Maxim Integrated MAX32665 User Manual

MAX32665-MAX32668 User Guide
Maxim Integrated Page 30 of 457
Offset
Register
Access
Description
[0x0270]
SPIXFC
R/W
SPIXFC RPU Register
[0x0280]
DMA0
R/W
DMA0 RPU Register
[0x0290]
FLC0
R/W
FLC0 RPU Register
[0x0294]
FLC1
R/W
FLC1 RPU Register
[0x02A0]
ICC0
R/W
ICC0 RPU Register
[0x02A4]
ICC1
R/W
ICC1 RPU Register
[0x02F0]
ICX
R/W
ICX RPU Register
[0x0330]
EMCC
R/W
EMCC RPU Register
[0x0340]
ADC
R/W
ADC RPU Register
[0x0350]
DMA1
R/W
DMA1 RPU Register
[0x0360]
SDMA
R/W
SDMA RPU Register
[0x0370]
SDHC
R/W
SD Host Controller (APB)
[0x03A0]
SPIXR
R/W
SPIXR RPU Register
[0x03C0]
PTG_BUS0
R/W
PTG_BUS0 RPU Register
[0x03D0]
OWM
R/W
OWM RPU Register
[0x03E0]
SEMA
R/W
SEMA RPU Register
[0x0420]
UART0
R/W
UART0 RPU Register
[0x0430]
UART1
R/W
UART1 RPU Register
[0x0440]
UART2
R/W
UART2 RPU Register
[0x0460]
SPI1
R/W
SPI1 RPU Register
[0x0470]
SPI2
R/W
SPI2 RPU Register
[0x04C0]
AUDIO
R/W
AUDIO RPU Register
[0x04D0]
TRNG
R/W
TRNG RPU Register
[0x0500]
BTLE
R/W
BTLE RPU Register
[0x11D0]
I2C0_BUS1
R/W
I2C0_BUS1 RPU Register
[0x11E0]
I2C1_BUS1
R/W
I2C1_BUS1 RPU Register
[0x11F0]
I2C2_BUS1
R/W
I2C2_BUS1 RPU Register
[0x13C0]
PTG_BUS1
R/W
PTG_BUS1 RPU Register
Table 2-6: RPU AHB Slave Register Addresses, Names, Access, and Descriptions
APB Address
Register
Access
Description
[0x0B10]
USBHS
R/W
USBHS RPU Register
[0x0B60]
SDIO/SDHC Target
R/W
SDIO/SDHC Target RPU Register
[0x0BC0]
SPIM
R/W
SPIM RPU Register
[0x0BE0]
QSPI/SPI
R/W
QSPI/SPI RPU Register

Maxim Integrated MAX32665 Specifications

General

Brand	Maxim Integrated
Model	MAX32665
Category	Motherboard
Language	English