Maxim Integrated MAX32665 - Page 95

MAX32665-MAX32668 User Guide
Maxim Integrated Page 95 of 457
Peripheral Clocks Disable 0
GCR_PCLK_DIS0
[0x0024]
Bits
Field
Access
Reset
Description
17
timer2
R/W
1
TMR2 Clock Disable
Disabling a clock disables functionality while also saving power. Reads and writes to
peripheral registers are disabled. Peripheral register states are retained.
0: Clock enabled.
1: Clock disabled.
16
timer1
R/W
1
TMR1 Clock Disable
Disabling a clock disables functionality while also saving power. Reads and writes to
peripheral registers are disabled. Peripheral register states are retained.
0: Clock enabled.
1: Clock disabled.
15
timer0
R/W
1
TMR0 Clock Disable
Disabling a clock disables functionality while also saving power. Reads and writes to
peripheral registers are disabled. Peripheral register states are retained.
0: Clock enabled.
1: Clock disabled.
14
crypto
R/W
1
Crypto Clock Disable
Disabling a clock disables functionality while also saving power. Reads and writes to
peripheral registers are disabled. Peripheral register states are retained.
0: Clock enabled.
1: Clock disabled.
13
i2c0
R/W
1
I2C0 Clock Disable
Disabling a clock disables functionality while also saving power. Reads and writes to
peripheral registers are disabled. Peripheral register states are retained.
0: Clock enabled.
1: Clock disabled.
12:11
-
RO
0
Reserved
10
uart1
R/W
1
UART1 Clock Disable
Disabling a clock disables functionality while also saving power. Reads and writes to
peripheral registers are disabled. Peripheral register states are retained.
0: Clock enabled.
1: Clock disabled.
9
uart0
R/W
1
UART0 Clock Disable
Write 1 to disable the clock to the corresponding peripheral. Disabling a clock peripheral
disables functionality while also saving power. Reads and writes to peripheral registers
are disabled. Peripheral register states are retained.
1: Clock disabled to peripheral.
0: Clock enabled to peripheral.
8
spi2
R/W
1
SPI2 Clock Disable
Disabling a clock disables functionality while also saving power. Reads and writes to
peripheral registers are disabled. Peripheral register states are retained.
0: Clock enabled.
1: Clock disabled.
7
spi1
R/W
1
SPI1 Clock Disable
Disabling a clock disables functionality while also saving power. Reads and writes to
peripheral registers are disabled. Peripheral register states are retained.
0: Clock enabled.
1: Clock disabled.