Maxim Integrated MAX32665 - Page 189

MAX32665-MAX32668 User Guide
Maxim Integrated Page 189 of 457
SDMA Transfer Mode Register
SDHC_TRANS
[0x000C]
Bits
Name
Access
Reset
Description
4
read_write
R/W
0
Data Transfer Direction Select
Sets the direction for DAT line data transfers. Set to 1 to transfer data from the SD
card to the SDHC (Read). For all other commands, set this bit to 0 (Write).
1: Read (from card to host)
0: Write (from host to card)
3:2
auto_cmd_en
R/W
0
Auto CMD Enable / Function Selection
0b00: Auto Command Disabled
0b01: Auto CMD12 Enable
0b10: Auto CMD23 Enable
0b11: Reserved for Future Use
Auto CMD12 Enable
When auto_cmd_en is set to 1, the SDHC issues CMD12 automatically after
completion of the last block transfer. If an error occurs from Auto CMD12, then the
error is saved to the SDHC_AUTO_CMD_ER register.
Note: Do not set to 1 if an Auto CMD12 is not required.
Auto CMD23 Enable
When this bit field is set to 0b10, the Host Controller issues a CMD23 automatically
before issuing the command specified in the SDHC_CMD (Command) register. The
following conditions are required to use Auto CMD23:
• Auto CMD23 support (Host Controller Version is 3.00 or later)
• A memory card that supports CMD23 (SCR[33] = 1)
• If using DMA, ADMA mode only
• Only when CMD18 or CMD25 is issued
You can use Auto CMD23 with or without ADMA. By writing to the Command register,
the SDHC issues a CMD23 first, and then issues the command specified by the
Command Index (SDHC_CMD.idx) in the Command register. If response errors are
detected from CMD23, then the second command is not issued. A CMD23 error is
indicated in the Auto CMD Error Status register (SDHC_AUTO_CMD_ER).
The 32-bit block count value for CMD23 is set to the SDMA System Address /
Argument 2 register (SDHC_SDMA).
Note: The SDHC does not check the command index.
1
blk_cnt_en
R/W
0
Block Count Enable
Set to enable the Block Count register (SDHC_BLK_CNT) for multiple block transfers.
When this bit is 0, the Block Count register (SDHC_BLK_CNT) is disabled, which is
useful if executing an infinite transfer.
1: Enable SDHC_BLK_CNT register
0: Disable SDHC_BLK_CNT register
0
dma_en
R/W
0
DMA Enable
Enables DMA functionality per the Capabilities register.
If this bit is set to 1, a DMA operation begins when the card driver writes to the upper
byte of the Command register (SDHC_CMD).
1: DMA mode is enabled as specified in the SDHC_HOST_CN_1.dma_select field.
0: DMA mode disabled.