Maxim Integrated MAX32665 User Manual

MAX32665-MAX32668 User Guide
Maxim Integrated Page 242 of 457
Crypto Control Register
CRYPTO_CTRL
[0x0000]
Bits
Name
Access
Reset
Description
13:12
-
R/W
0
Reserved for Future Use
Do not modify this field.
11:10
rdsrc
R/W
0
Read FIFO Source Select
This field selects the source of the read FIFO. The default is for the Read
FIFO to not use DMA as its source buffer.
0b00: DMA disabled.
0b01: DMA or Direct via CRC_DATA_IN3:CRC_DATA_IN0 registers.
0b10: CRC_PRNG
0b11: Reserved for Future Use.
9:8
wrsrc
R/W
0
Write FIFO Source Select
This field selects the source of the Write FIFO. The default is for the Write
FIFO to not use DMA as its source buffer.
0b00: DMA disabled.
0b01: DMA or direct via CRC_DATA_OUT3: CRC_DATA_OUT0 registers.
0b10: CRC_PRNG
0b11: Reserved for Future Use.
7:6
-
R/W
0
Reserved for Future Use
Do not modify this field.
5
bsi
R/W
0
Byte Swap Input
Enables input word byte swapping if set.
0: Input bytes are not byte swapped.
1: Input bytes are byte swapped.
Note: Byte swap only occurs on full words.
4
bso
R/W
0
Byte Swap Output
Enable output word byte swapping if set.
0: Output bytes are not byte swapped.
1: Output bytes are byte swapped.
Note: Byte swap only occurs on full words.
3
-
R/W
0
Reserved for Future Use
Do not modify this field.
2
src
R/W
0
Source Select
Selects the CRC generator input source.
0: CRC uses input FIFO.
1: CRC uses output FIFO.
1
int
R/W
0
Interrupt Enable
Set this field to 1 to generate a CRC/Crypto IRQ when an interrupt flag is
set (done or error).
0: Interrupt disabled.
1: Interrupt enabled.
0
rst
R/W
0
Reset
Set this field to reset the CRC including the FIFOs. The CRYPTO_CTRL
register is not reset.
0: Reset not active.
1: Reset the CRC Engine.

Maxim Integrated MAX32665 Specifications

General

Brand	Maxim Integrated
Model	MAX32665
Category	Motherboard
Language	English