MAX32665-MAX32668 User Guide
Maxim Integrated Page 97 of 457
USB FIFO LIGHTSLEEP Enable
Data is unavailable for read/write operations in LIGHTSLEEP mode but is retained.
0: ACTIVE mode.
1: LIGHTSLEEP mode enabled.
Crypto RAM LIGHTSLEEP Enable
Data is unavailable for read/write operations in LIGHTSLEEP mode but is retained.
0: ACTIVE mode.
1: LIGHTSLEEP mode enabled.
SRCC Cache LIGHTSLEEP Enable
Data is unavailable for read/write operations in LIGHTSLEEP mode but is retained.
0: ACTIVE mode.
1: LIGHTSLEEP mode enabled.
SFCC Cache RAM LIGHTSLEEP Enable
Data is unavailable for read/write operations in LIGHTSLEEP mode but is retained.
0: ACTIVE mode.
1: LIGHTSLEEP mode enabled.
Internal Flash ICC0 LIGHTSLEEP Enable
Data is unavailable for read/write operations in LIGHTSLEEP mode but is retained.
0: ACTIVE mode.
1: LIGHTSLEEP mode enabled.
Reserved
Do not modify this field.
Sysram6 to Sysram11 LIGHTSLEEP Enable
Data is unavailable for read/write operations in LIGHTSLEEP mode but is retained.
See Table 4-13 RAM for base address and size information.
0: ACTIVE mode.
1: LIGHTSLEEP mode enabled.
Note: To put RAM in a shutdown mode that removes all power from the RAM and
reset the RAM contents, use the PWRSEQ_LPMEMSD register.
Sysram5 LIGHTSLEEP Enable
Data is unavailable for read/write operations in LIGHTSLEEP mode but is retained.
See Table 4-13 RAM for base address and size information.
0: ACTIVE mode.
1: LIGHTSLEEP mode enabled.
Note: To put RAM in a shutdown mode that removes all power from the RAM and
reset the RAM contents, use the PWRSEQ_LPMEMSD register.
Sysram4 LIGHTSLEEP Enable
Data is unavailable for read/write operations in LIGHTSLEEP mode but is retained.
See Table 4-13 RAM for base address and size information.
0: ACTIVE mode.
1: LIGHTSLEEP mode enabled.
Note: To put RAM in a shutdown mode that removes all power from the RAM and
reset the RAM contents, use the PWRSEQ_LPMEMSD register.