Chapter 43
Universal Serial Bus Full Speed OTG Controller
(USBFSOTG)
43.1 Introduction
NOTE
For the chip-specific implementation details of this module's
instances, see the chip configuration information.
This chapter describes the USB full speed OTG controller. The OTG implementation in
this module provides limited host functionality and device solutions for implementing a
USB 2.0 full-speed/low-speed compliant peripheral. The OTG logic implements features
required by the On-The-Go and Embedded Host Supplement to the USB 2.0 Specification
(usb.org, 2008). The USB full speed controller interfaces to a USBFS/LS transceiver.
NOTE
This chapter describes the following registers that have similar
names: USB_OTGCTL, USB_CTL, USB_CTRL, and
USB_CONTROL. These are all separate registers.
43.1.1
References
The following publications are referenced in this document. For copies or updates to
these specifications, see the USB Implementers Forum, Inc. website at http://
www.usb.org.
•
Universal Serial Bus Specification, Revision 2.0 , 2000, with amendments including
those listed below
•
Errata for “USB Revision 2.0 April 27, 2000” as of 12/7/2000
•
Errata for “USB Revision 2.0 April 27, 2000” as of May 28, 2002
K22F Sub-Family Reference Manual, Rev. 4, 08/2016
NXP Semiconductors 1069
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