LLWU_F3 field descriptions (continued)
Field Description
Indicates that an enabled internal peripheral was a source of exiting a low-leakage power mode. To clear
the flag, follow the internal peripheral flag clearing mechanism.
0 Module 2 input was not a wakeup source
1 Module 2 input was a wakeup source
1
MWUF1
Wakeup flag For module 1
Indicates that an enabled internal peripheral was a source of exiting a low-leakage power mode. To clear
the flag, follow the internal peripheral flag clearing mechanism.
0 Module 1 input was not a wakeup source
1 Module 1 input was a wakeup source
0
MWUF0
Wakeup flag For module 0
Indicates that an enabled internal peripheral was a source of exiting a low-leakage power mode. To clear
the flag, follow the internal peripheral flag clearing mechanism.
0 Module 0 input was not a wakeup source
1 Module 0 input was a wakeup source
17.3.9 LLWU Pin Filter 1 register (LLWU_FILT1)
LLWU_FILT1 is a control and status register that is used to enable/disable the digital
filter 1 features for an external pin.
NOTE
This register is reset on Chip Reset not VLLS and by reset
types that trigger Chip Reset not VLLS. It is unaffected by reset
types that do not trigger Chip Reset not VLLS. See the
Introduction details for more information.
Address:
4007_C000h base + 8h offset = 4007_C008h
Bit 7 6 5 4 3 2 1 0
Read FILTF
FILTE
0
FILTSEL
Write w1c
Reset
0 0 0 0 0 0 0 0
LLWU_FILT1 field descriptions
Field Description
7
FILTF
Filter Detect Flag
Indicates that the filtered external wakeup pin, selected by FILTSEL, was a source of exiting a low-leakage
power mode. To clear the flag write a one to FILTF.
Table continues on the next page...
Memory map/register definition
K22F Sub-Family Reference Manual, Rev. 4, 08/2016
394 NXP Semiconductors
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