NXP Semiconductors K22F series - Implementation

• Optional back-to-back mode operation, which enables the ADC conversions
complete to trigger the next PDB channel
• One programmable delay interrupt
• One sequence error interrupt
• One channel flag and one sequence error flag per pre-trigger
• DMA support
• Up to 8 pulse outputs (pulse-out's)
• Pulse-out's can be enabled or disabled independently
• Programmable pulse width
NOTE
The number of PDB input and output triggers are chip-specific.
See the chip-specific PDB information for details.
38.1.2
Implementation
In this section, the following letters refer to the number of output triggers:
• N—Total available number of PDB channels.
•
n—PDB channel number, valid from 0 to N-1.
• M—Total available pre-trigger per PDB channel.
•
m—Pre-trigger number, valid from 0 to M-1.
• X—Total number of DAC interval triggers.
•
x—DAC interval trigger output number, valid from 0 to X-1.
• Y—Total number of Pulse-Out's.
•
y—Pulse-Out number, valid value is from 0 to Y-1.
NOTE
The number of module output triggers to core is chip-specific.
For module to core output triggers implementation, see the chip
configuration information.
Introduction
K22F Sub-Family Reference Manual, Rev. 4, 08/2016
868 NXP Semiconductors