39.1.3 Modes of operation
When the chip is in an active BDM mode, the FTM temporarily suspends all counting
until the chip returns to normal user operating mode. During Stop mode, all FTM input
clocks are stopped, so the FTM is effectively disabled until clocks resume. During Wait
mode, the FTM continues to operate normally. If the FTM does not need to produce a
real time reference or provide the interrupt sources needed to wake the chip from Wait
mode, the power can then be saved by disabling FTM functions before entering Wait
mode.
39.1.4 Block diagram
The FTM uses one input/output (I/O) pin per channel, CHn (FTM channel (n)) where n is
the channel number (0–7).
The following figure shows the FTM structure. The central component of the FTM is the
16-bit counter with programmable initial and final values and its counting can be up or
up-down.
NOTE
The number of channels supported can vary for each instance of
the FTM module on a chip. See the chip-specific FTM
information to see how many channels are supported for each
module instance. For example, if a module instance supports
only six channels, references to channel numbers 6 and 7 do not
apply for that instance.
Introduction
K22F Sub-Family Reference Manual, Rev. 4, 08/2016
894 NXP Semiconductors
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