3.8.4.2 LPTMR pulse counter input options
The LPTMR_CSR[TPS] bitfield configures the input source used in pulse counter mode.
The following table shows the chip-specific input assignments for this bitfield.
LPTMR_CSR[TPS] Pulse counter input number Chip input
00 0 CMP0 output
01 1 LPTMR_ALT1 pin
10 2 LPTMR_ALT2 pin
11 3 Reserved
3.8.5 RTC configuration
This section summarizes how the module has been configured in the chip. For a
comprehensive description of the module itself, see the module’s dedicated chapter.
Signal
multiplexing
Register
access
Peripheral
bridge
Module signals
Real-time clock
Figure 3-44. RTC configuration
Table 3-59. Reference links to related information
Topic Related module Reference
Full description RTC RTC
System memory map System memory map
Clocking Clock Distribution
Power management Power management
Timers
K22F Sub-Family Reference Manual, Rev. 4, 08/2016
120 NXP Semiconductors
To Next Page
Loading...
