The modulus value in the MOD register is used to reset the counter back to zero at the
end of the count. If SC[CONT] is set, then the counter will then resume a new count;
otherwise, the counter operation will stop until the next trigger input event occurs.
38.4.2 PDB trigger input source selection
The PDB has up to 15 trigger input sources, namely Trigger-In 0 to Trigger-In 14. They
are connected to on-chip or off-chip event sources. The PDB can be triggered by software
through SC[SWTRIG].
For the trigger input sources implemented in this MCU, see chip configuration
information.
38.4.3
Pulse-Out's
PDB can generate pulse outputs of configurable width.
•
When the PDB counter reaches the value set in POyDLY[DLY1], then the Pulse-Out
goes high.
•
When the PDB counter reaches POyDLY[DLY2], then it goes low.
POyDLY[DLY2] can be set either greater or less than POyDLY[DLY1].
ADC pre-trigger/trigger outputs and Pulse-Out generation have the same time base,
because they both share the PDB counter. The pulse-out connections implemented in this
MCU are described in the device's chip configuration details.
Chapter 38 Programmable Delay Block (PDB)
K22F Sub-Family Reference Manual, Rev. 4, 08/2016
NXP Semiconductors 885
To Next Page
Loading...
