22.3.14 Set START Bit Register (DMA_SSRT)
The SSRT provides a simple memory-mapped mechanism to set the START bit in the
TCD of the given channel. The data value on a register write causes the START bit in the
corresponding transfer control descriptor to be set. Setting the SAST bit provides a global
set function, forcing all START bits to be set. If the NOP bit is set, the command is
ignored. This allows you to write multiple-byte registers as a 32-bit word. Reads of this
register return all zeroes.
Address:
4000_8000h base + 1Dh offset = 4000_801Dh
Bit 7 6 5 4 3 2 1 0
Read 0 0 0
Write NOP SAST 0 SSRT
Reset
0 0 0 0 0 0 0 0
DMA_SSRT field descriptions
Field Description
7
NOP
No Op enable
0 Normal operation
1 No operation, ignore the other bits in this register
6
SAST
Set All START Bits (activates all channels)
0 Set only the TCDn_CSR[START] bit specified in the SSRT field
1 Set all bits in TCDn_CSR[START]
5–4
Reserved
This field is reserved.
SSRT Set START Bit
Sets the corresponding bit in TCDn_CSR[START]
Chapter 22 Enhanced Direct Memory Access (eDMA)
K22F Sub-Family Reference Manual, Rev. 4, 08/2016
NXP Semiconductors 455
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