Source UART 0 UART 1 UART 2
Transmit threshold (ISO7816) x — —
Receiver threshold (ISO7816) x — —
Wait timer (ISO7816) x — —
Character wait timer
(ISO7816)
x — —
Block wait timer (ISO7816) x — —
Guard time violation
(ISO7816)
x — —
ATR duration timer
(ISO7816)
x — —
3.9.5 LPUART configuration
This section summarizes how the module has been configured in the chip. For a
comprehensive description of the module itself, see the module’s dedicated chapter.
Register
access
Peripheral
bridge
LPUART
Signal
multiplexing
Module signals
Figure 3-55. LPUART configuration
Table 3-69. Reference links to related information
Topic Related module Reference
Full description LPUART0 LPUART
System memory map System memory map
Clocking Clock distribution
Power management Power management
Signal multiplexing Port control Signal multiplexing
Chapter 3 Chip Configuration
K22F Sub-Family Reference Manual, Rev. 4, 08/2016
NXP Semiconductors 133
To Next Page
Loading...
Need help?
General
