45.3.10 Transmit FIFO Registers (SPIx_TXFRn)
TXFRn registers provide visibility into the TX FIFO for debugging purposes. Each
register is an entry in the TX FIFO. The registers are read-only and cannot be modified.
Reading the TXFRx registers does not alter the state of the TX FIFO.
Address: Base address + 3Ch offset + (4d × i), where i=0d to 3d
Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
R
TXCMD_TXDATA TXDATA
W
Reset
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
SPIx_TXFRn field descriptions
Field Description
31–16
TXCMD_
TXDATA
Transmit Command or Transmit Data
In Master mode the TXCMD field contains the command that sets the transfer attributes for the SPI data.
In Slave mode, this field is reserved.
TXDATA Transmit Data
Contains the SPI data to be shifted out.
45.3.11 Receive FIFO Registers (SPIx_RXFRn)
RXFRn provide visibility into the RX FIFO for debugging purposes. Each register is an
entry in the RX FIFO. The RXFR registers are read-only. Reading the RXFRx registers
does not alter the state of the RX FIFO.
Address: 
Base address + 7Ch offset + (4d × i), where i=0d to 3d
Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
R
RXDATA
W
Reset
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
SPIx_RXFRn field descriptions
Field Description
RXDATA Receive Data
Contains the received SPI data.
Memory Map/Register Definition
K22F Sub-Family Reference Manual, Rev. 4, 08/2016
1150 NXP Semiconductors