NXP Semiconductors K22F series User Manual

Table 3-7. AWIC Partial Stop, Stop and VLPS Wake-up Sources (continued)
Wake-up source Description
CMPx Since no system clocks are available, functionality is limited, trigger mode provides wakeup
functionality with periodic sampling
I
2
C Address match wakeup
UART Active edge on RXD
LPUART Functional when using clock source which is active in Stop and VLPS modes
USB FS/LS Controller Wakeup
LPTMR Functional when using clock source which is active in Stop and VLPS modes
RTC Functional in Stop/VLPS modes
I2S (SAI) Functional when using an external bit clock or external master clock
NMI Non-maskable interrupt
3.2.4 FPU Configuration
This section summarizes how the module has been configured in the chip. For a
comprehensive description of the module itself, see the module’s dedicated chapter.
FPU
Transfers
ARM Cortex M4
Core
PPB
Figure 3-4. FPU configuration
Table 3-8. Reference links to related information
Topic Related module Reference
Full description FPU ARM Cortex-M4 Technical Reference Manual
System memory map System memory map
Clocking Clock Distribution
Power Management Power Management
Transfers
Private Peripheral Bus
(PPB)
ARM Cortex M4 core ARM Cortex-M4 core
Core modules
K22F Sub-Family Reference Manual, Rev. 4, 08/2016
66 NXP Semiconductors

NXP Semiconductors K22F series Specifications

General

Brand	NXP Semiconductors
Model	K22F series
Category	Controller
Language	English