Table 4-2. Peripheral bridge 0 slot assignments (continued)
System 32-bit base address Slot
number
Module
0x4007_3000 115 Analog comparator (CMP) / 6-bit digital-to-analog converter (DAC)
0x4007_4000 116 Voltage reference (VREF)
0x4007_5000 117 —
0x4007_6000 118 —
0x4007_7000 119 —
0x4007_8000 120 —
0x4007_9000 121 —
0x4007_A000 122 —
0x4007_B000 123 —
0x4007_C000 124 Low-leakage wakeup unit (LLWU)
0x4007_D000 125 Power management controller (PMC)
0x4007_E000 126 System Mode controller (SMC)
0x4007_F000 127 Reset Control Module (RCM)
0x400F_F000 GPIO controller
4.6 Private Peripheral Bus (PPB) memory map
The PPB is part of the defined ARM bus architecture and provides access to select
processor-local modules. These resources are only accessible from the core; other system
masters do not have access to them.
Table 4-3. PPB memory map
System 32-bit Address Range Resource
0xE000_0000–0xE000_0FFF Instrumentation Trace Macrocell (ITM)
0xE000_1000–0xE000_1FFF Data Watchpoint and Trace (DWT)
0xE000_2000–0xE000_2FFF Flash Patch and Breakpoint (FPB)
0xE000_3000–0xE000_DFFF Reserved
0xE000_E000–0xE000_EFFF System Control Space (SCS) (for NVIC and FPU)
0xE000_F000–0xE003_FFFF Reserved
0xE004_0000–0xE004_0FFF Trace Port Interface Unit (TPIU)
0xE004_1000–0xE004_1FFF Reserved
0xE004_2000–0xE004_2FFF Reserved
0xE004_3000–0xE004_3FFF Reserved
0xE004_4000–0xE007_FFFF Reserved
0xE008_0000–0xE008_0FFF Miscellaneous Control Module (MCM)
0xE008_1000–0xE008_1FFF Reserved
Table continues on the next page...
Private Peripheral Bus (PPB) memory map
K22F Sub-Family Reference Manual, Rev. 4, 08/2016
148 NXP Semiconductors
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