Chapter 31
External Bus Interface (FlexBus)
31.1 Introduction
NOTE
For the chip-specific implementation details of this module's
instances, see the chip configuration information.
This chapter describes external bus data transfer operations and error conditions. It
describes transfers initiated by the core processor (or any other bus master) and includes
detailed timing diagrams showing the interaction of signals in supported bus operations.
31.1.1
Definition
The FlexBus multifunction external bus interface controller is a hardware module that:
• Provides memory expansion and provides connection to external peripherals with a
parallel bus
• Can be directly connected to the following asynchronous or synchronous slave-only
devices with little or no additional circuitry:
• External ROMs
• Flash memories
• Programmable logic devices
• Other simple target (slave) devices
K22F Sub-Family Reference Manual, Rev. 4, 08/2016
NXP Semiconductors 693
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