45.3.6 DMA/Interrupt Request Select and Enable Register
(SPIx_RSER)
RSER controls DMA and interrupt requests. Do not write to the RSER while the module
is in the Running state.
Address: Base address + 30h offset
Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
R
TCF_RE
Reserved
Reserved
EOQF_RE
TFUF_RE
Reserved
TFFF_RE
TFFF_DIRS
Reserved
Reserved
Reserved
Reserved
RFOF_RE
Reserved
RFDF_RE
RFDF_DIRS
W
Reset
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Bit
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
R
Reserved
Reserved
0
W
Reset
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
SPIx_RSER field descriptions
Field Description
31
TCF_RE
Transmission Complete Request Enable
Enables TCF flag in the SR to generate an interrupt request.
0 TCF interrupt requests are disabled.
1 TCF interrupt requests are enabled.
30
Reserved
Always write the reset value to this field.
This field is reserved.
29
Reserved
Always write the reset value to this field.
This field is reserved.
28
EOQF_RE
Finished Request Enable
Enables the EOQF flag in the SR to generate an interrupt request.
0 EOQF interrupt requests are disabled.
1 EOQF interrupt requests are enabled.
27
TFUF_RE
Transmit FIFO Underflow Request Enable
Enables the TFUF flag in the SR to generate an interrupt request.
Table continues on the next page...
Chapter 45 Serial Peripheral Interface (SPI)
K22F Sub-Family Reference Manual, Rev. 4, 08/2016
NXP Semiconductors 1145