SPIx_RSER field descriptions (continued)
Field Description
Selects between generating a DMA request or an interrupt request. When the RFDF flag bit in the SR is
set, and the RFDF_RE bit in the RSER is set, the RFDF_DIRS bit selects between generating an interrupt
request or a DMA request.
0 Interrupt request.
1 DMA request.
15
Reserved
Always write the reset value to this field.
This field is reserved.
14
Reserved
Always write the reset value to this field.
This field is reserved.
Reserved This field is reserved.
This read-only field is reserved and always has the value 0.
45.3.7 PUSH TX FIFO Register In Master Mode (SPIx_PUSHR)
Specifies data to be transferred to the TX FIFO. An 8- or 16-bit write access transfers all
32 bits to the TX FIFO. In Master mode, the register transfers 16 bits of data and 16 bits
of command information. A read access of PUSHR returns the topmost TX FIFO entry.
When the module is disabled, writing to this register does not update the FIFO.
Therefore, any reads performed while the module is disabled return the last PUSHR write
performed while the module was still enabled.
Address:
Base address + 34h offset
Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
R
CONT
CTAS EOQ
CTCNT
Reserved Reserved PCS
W
Reset
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Bit
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
R
TXDATA
W
Reset
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Chapter 45 Serial Peripheral Interface (SPI)
K22F Sub-Family Reference Manual, Rev. 4, 08/2016
NXP Semiconductors 1147
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