Chapter 19
Crossbar Switch Lite (AXBS-Lite)
19.1 Introduction
NOTE
For the chip-specific implementation details of this module's
instances, see the chip configuration information.
The information found here provides information on the layout, configuration, and
programming of the crossbar switch.
The crossbar switch connects bus masters and bus slaves using a crossbar switch
structure. This structure allows up to four bus masters to access different bus slaves
simultaneously, while providing arbitration among the bus masters when they access the
same slave.
19.1.1
Features
The crossbar switch includes these features:
• Symmetric crossbar bus switch implementation
• Allows concurrent accesses from different masters to different slaves
• Up to single-clock 32-bit transfer
• Programmable configuration for fixed-priority or round-robin slave port arbitration
(see the chip-specific information).
K22F Sub-Family Reference Manual, Rev. 4, 08/2016
NXP Semiconductors 407
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