If e_sg = 0b and the dlast_sga changed, the dynamic link attempt was successful (the
new TCD’s e_sg value cleared the e_sg bit).
22.5.8 Lockstep
This chip contains an eDMA Checker which, when enabled, operates in Lockstep mode
with the primary eDMA, executing the exact same transfer profiles. The eDMA Checker
checks to ensure the primary eDMA is operating correctly. A block diagram is shown
below.
DMA checker
RCCU
Checker Lake
Alarms
delay_element
delay_element
delay_element
delay_element
DMA
Inputs
DMA
Outputs
DMA
Outputs
Signal
Compression
Signal
Compression
DMA
22.5.8.1 Initialization
To prevent the eDMA Checker from generating a false comparison error after power-on-
reset, the eDMA’s data output buffer must be initialized prior to enabling the Checker. To
initialize the eDMA data output buffer, the eDMA must perform a one or more 32-bit
data transfers using any data value.
Chapter 22 Enhanced Direct Memory Access (eDMA)
K22F Sub-Family Reference Manual, Rev. 4, 08/2016
NXP Semiconductors 507
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